From 4d0e6e0d73daca57a9dc4abfb42d7e3cffe52985 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha <prabhakar@freescale.com> Date: Fri, 17 May 2013 13:40:52 +0530 Subject: [PATCH] board/b4860qds: Relax NOR flash teadc timing parameter Relax parameters to give address latching more time to setup. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> --- include/configs/B4860QDS.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index b45001a589..a823f9f3a7 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -236,7 +236,7 @@ unsigned long get_board_ddr_clk(void); /* NOR Flash Timing Params */ #define CONFIG_SYS_NOR_CSOR CSOR_NOR_ADM_SHIFT(4) #define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x01) | \ - FTIM0_NOR_TEADC(0x01) | \ + FTIM0_NOR_TEADC(0x04) | \ FTIM0_NOR_TEAHC(0x20)) #define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \ FTIM1_NOR_TRAD_NOR(0x1A) |\ -- 2.39.5