From 3ebbbfe4c78089db47599fc7b57ad016e247dd52 Mon Sep 17 00:00:00 2001
From: Tom Warren <twarren@nvidia.com>
Date: Thu, 28 Mar 2013 10:03:22 -0700
Subject: [PATCH] Tegra: Restore cp15 VBAR _start vector write for ARMv7

A start vector fix was added by AneeshV for OMAP4 (commit 0d479b53),
and caused the old monilithic Tegra builds to hang due to an undefined
instruction trap. Previously, the code needed to run on both the
AVP (ARM7TDI) and A9, and the AVP doesn't have a CP15 register.
I corrected this in commit 6d6c0bae w/#ifndef CONFIG_TEGRA, but
now that we use SPL, and boot the AVP w/o any ARMv7 code, I can
revert my change, and make Aneesh's change apply to Tegra.

Signed-off-by: Tom Warren <twarren@nvidia.com>
---
 arch/arm/cpu/armv7/start.S | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 5feae7ace3..e9e57e6450 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -253,11 +253,9 @@ ENTRY(c_runtime_cpu_setup)
 /*
  * Move vector table
  */
-#if !defined(CONFIG_TEGRA)
 	/* Set vector address in CP15 VBAR register */
 	ldr     r0, =_start
 	mcr     p15, 0, r0, c12, c0, 0  @Set VBAR
-#endif /* !Tegra */
 
 	bx	lr
 
-- 
2.39.5