From: Marek Vasut Date: Sun, 17 Sep 2023 14:11:30 +0000 (+0200) Subject: clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.5.3 X-Git-Url: http://git.dujemihanovic.xyz/img/%7B%7B%20%28.OutputFormats.Get?a=commitdiff_plain;h=e2c11b3c1872a204246165497cebc3b945e26dd8;p=u-boot.git clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.5.3 Synchronize R-Car R8A77965 M3-N clock tables with Linux 6.5.3, commit 238589d0f7b421aae18c5704dc931595019fa6c7 . Signed-off-by: Marek Vasut --- diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c index 58e557a95f..8a5c1525ec 100644 --- a/drivers/clk/renesas/r8a77965-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c @@ -50,7 +50,7 @@ enum clk_ids { MOD_CLK_BASE }; -static const struct cpg_core_clk r8a77965_core_clks[] = { +static const struct cpg_core_clk r8a77965_core_clks[] __initconst = { /* External Clock Inputs */ DEF_INPUT("extal", CLK_EXTAL), DEF_INPUT("extalr", CLK_EXTALR), @@ -124,7 +124,7 @@ static const struct cpg_core_clk r8a77965_core_clks[] = { DEF_BASE("r", R8A77965_CLK_R, CLK_TYPE_GEN3_R, CLK_RINT), }; -static const struct mssr_mod_clk r8a77965_mod_clks[] = { +static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1), DEF_MOD("tmu4", 121, R8A77965_CLK_S0D6), DEF_MOD("tmu3", 122, R8A77965_CLK_S3D2), @@ -302,7 +302,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] = { (((md) & BIT(19)) >> 18) | \ (((md) & BIT(17)) >> 17)) -static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] = { +static const struct rcar_gen3_cpg_pll_config cpg_pll_configs[16] __initconst = { /* EXTAL div PLL1 mult/div PLL3 mult/div OSC prediv */ { 1, 192, 1, 192, 1, 16, }, { 1, 192, 1, 128, 1, 16, },