{
const u8 *val;
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
if (!np)
return -EINVAL;
val = of_find_property_value_of_size(np, propname, sizeof(*outp));
if (IS_ERR(val)) {
- dm_warn("(not found)\n");
+ log_debug("(not found)\n");
return PTR_ERR(val);
}
*outp = *val;
- dm_warn("%#x (%d)\n", *outp, *outp);
+ log_debug("%#x (%d)\n", *outp, *outp);
return 0;
}
{
const __be16 *val;
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
if (!np)
return -EINVAL;
val = of_find_property_value_of_size(np, propname, sizeof(*outp));
if (IS_ERR(val)) {
- dm_warn("(not found)\n");
+ log_debug("(not found)\n");
return PTR_ERR(val);
}
*outp = be16_to_cpup(val);
- dm_warn("%#x (%d)\n", *outp, *outp);
+ log_debug("%#x (%d)\n", *outp, *outp);
return 0;
}
{
const __be32 *val;
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
val = of_find_property_value_of_size(np, propname,
sz * sizeof(*out_values));
if (IS_ERR(val))
return PTR_ERR(val);
- dm_warn("size %zd\n", sz);
+ log_debug("size %zd\n", sz);
while (sz--)
*out_values++ = be32_to_cpup(val++);
{
const __be32 *val;
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
if (!np)
return -EINVAL;
val = of_find_property_value_of_size(np, propname,
sizeof(*outp) * (index + 1));
if (IS_ERR(val)) {
- dm_warn("(not found)\n");
+ log_debug("(not found)\n");
return PTR_ERR(val);
}
*outp = be32_to_cpup(val + index);
- dm_warn("%#x (%d)\n", *outp, *outp);
+ log_debug("%#x (%d)\n", *outp, *outp);
return 0;
}
{
const __be64 *val;
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
if (!np)
return -EINVAL;
val = of_find_property_value_of_size(np, propname,
sizeof(*outp) * (index + 1));
if (IS_ERR(val)) {
- dm_warn("(not found)\n");
+ log_debug("(not found)\n");
return PTR_ERR(val);
}
*outp = be64_to_cpup(val + index);
- dm_warn("%#llx (%lld)\n", (unsigned long long)*outp,
- (unsigned long long)*outp);
+ log_debug("%#llx (%lld)\n", (unsigned long long)*outp,
+ (unsigned long long)*outp);
return 0;
}
l = strnlen(p, end - p) + 1;
if (p + l > end)
return -EILSEQ;
- dm_warn("comparing %s with %s\n", string, p);
+ log_debug("comparing %s with %s\n", string, p);
if (strcmp(string, p) == 0)
return i; /* Found it; return index */
}
strncpy(ap->stem, stem, stem_len);
ap->stem[stem_len] = 0;
list_add_tail(&ap->link, &aliases_lookup);
- dm_warn("adding DT alias:%s: stem=%s id=%i node=%s\n",
- ap->alias, ap->stem, ap->id, of_node_full_name(np));
+ log_debug("adding DT alias:%s: stem=%s id=%i node=%s\n",
+ ap->alias, ap->stem, ap->id, of_node_full_name(np));
}
int of_alias_scan(void)
#ifdef DEBUG
static void of_dump_addr(const char *s, const __be32 *addr, int na)
{
- dm_warn("%s", s);
+ pr_debug("%s", s);
while (na--)
pr_cont(" %08x", be32_to_cpu(*(addr++)));
pr_cont("\n");
s = of_read_number(range + na + pna, ns);
da = of_read_number(addr, na);
- dm_warn("default map, cp=%llx, s=%llx, da=%llx\n",
- (unsigned long long)cp, (unsigned long long)s,
- (unsigned long long)da);
+ log_debug("default map, cp=%llx, s=%llx, da=%llx\n",
+ (unsigned long long)cp, (unsigned long long)s,
+ (unsigned long long)da);
if (da < cp || da >= (cp + s))
return OF_BAD_ADDR;
if (ranges == NULL || rlen == 0) {
offset = of_read_number(addr, na);
memset(addr, 0, pna * 4);
- dm_warn("empty ranges; 1:1 translation\n");
+ log_debug("empty ranges; 1:1 translation\n");
goto finish;
}
- dm_warn("walking ranges...\n");
+ log_debug("walking ranges...\n");
/* Now walk through the ranges */
rlen /= 4;
finish:
of_dump_addr("parent translation for:", addr, pna);
- dm_warn("with offset: %llx\n", (unsigned long long)offset);
+ log_debug("with offset: %llx\n", (unsigned long long)offset);
/* Translate it into parent bus space */
return pbus->translate(addr, offset, pna);
int na, ns, pna, pns;
u64 result = OF_BAD_ADDR;
- dm_warn("** translation for device %s **\n", of_node_full_name(dev));
+ log_debug("** translation for device %s **\n", of_node_full_name(dev));
/* Increase refcount at current level */
(void)of_node_get(dev);
}
memcpy(addr, in_addr, na * 4);
- dm_warn("bus is %s (na=%d, ns=%d) on %s\n", bus->name, na, ns,
- of_node_full_name(parent));
+ log_debug("bus is %s (na=%d, ns=%d) on %s\n", bus->name, na, ns,
+ of_node_full_name(parent));
of_dump_addr("translating address:", addr, na);
/* Translate */
/* If root, we have finished */
if (parent == NULL) {
- dm_warn("reached root node\n");
+ log_debug("reached root node\n");
result = of_read_number(addr, na);
break;
}
break;
}
- dm_warn("parent bus is %s (na=%d, ns=%d) on %s\n", pbus->name,
- pna, pns, of_node_full_name(parent));
+ log_debug("parent bus is %s (na=%d, ns=%d) on %s\n", pbus->name,
+ pna, pns, of_node_full_name(parent));
/* Apply bus translation */
if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
const fdt_addr_t *cell;
int len;
- dm_warn("%s: %s: %s\n", __func__, ofnode_get_name(node), prop_name);
+ log_debug("%s: %s: %s\n", __func__, ofnode_get_name(node), prop_name);
cell = ofnode_get_property(node, prop_name, &len);
if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
dm_warn("cell=%p, len=%d\n", cell, len);
*basep = fdt_addr_to_cpu(*cell);
*sizep = fdt_size_to_cpu(cell[1]);
- dm_warn("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
- (ulong)*sizep);
+ log_debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
+ (ulong)*sizep);
return 0;
}
int len;
assert(ofnode_valid(node));
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
if (ofnode_is_np(node))
return of_read_u8(ofnode_to_np(node), propname, outp);
cell = fdt_getprop(gd->fdt_blob, ofnode_to_offset(node), propname,
&len);
if (!cell || len < sizeof(*cell)) {
- dm_warn("(not found)\n");
+ log_debug("(not found)\n");
return -EINVAL;
}
*outp = *cell;
- dm_warn("%#x (%u)\n", *outp, *outp);
+ log_debug("%#x (%u)\n", *outp, *outp);
return 0;
}
int len;
assert(ofnode_valid(node));
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
if (ofnode_is_np(node))
return of_read_u16(ofnode_to_np(node), propname, outp);
cell = fdt_getprop(gd->fdt_blob, ofnode_to_offset(node), propname,
&len);
if (!cell || len < sizeof(*cell)) {
- dm_warn("(not found)\n");
+ log_debug("(not found)\n");
return -EINVAL;
}
*outp = be16_to_cpup(cell);
- dm_warn("%#x (%u)\n", *outp, *outp);
+ log_debug("%#x (%u)\n", *outp, *outp);
return 0;
}
int len;
assert(ofnode_valid(node));
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
if (ofnode_is_np(node))
return of_read_u32_index(ofnode_to_np(node), propname, index,
cell = fdt_getprop(ofnode_to_fdt(node), ofnode_to_offset(node),
propname, &len);
if (!cell) {
- dm_warn("(not found)\n");
+ log_debug("(not found)\n");
return -EINVAL;
}
if (len < (sizeof(int) * (index + 1))) {
- dm_warn("(not large enough)\n");
+ log_debug("(not large enough)\n");
return -EOVERFLOW;
}
*outp = fdt32_to_cpu(cell[index]);
- dm_warn("%#x (%u)\n", *outp, *outp);
+ log_debug("%#x (%u)\n", *outp, *outp);
return 0;
}
cell = fdt_getprop(ofnode_to_fdt(node), ofnode_to_offset(node),
propname, &len);
if (!cell) {
- dm_warn("(not found)\n");
+ log_debug("(not found)\n");
return -EINVAL;
}
if (len < (sizeof(u64) * (index + 1))) {
- dm_warn("(not large enough)\n");
+ log_debug("(not large enough)\n");
return -EOVERFLOW;
}
*outp = fdt64_to_cpu(cell[index]);
- dm_warn("%#llx (%llu)\n", *outp, *outp);
+ log_debug("%#llx (%llu)\n", *outp, *outp);
return 0;
}
int len;
assert(ofnode_valid(node));
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
if (ofnode_is_np(node))
return of_read_u64(ofnode_to_np(node), propname, outp);
cell = fdt_getprop(ofnode_to_fdt(node), ofnode_to_offset(node),
propname, &len);
if (!cell || len < sizeof(*cell)) {
- dm_warn("(not found)\n");
+ log_debug("(not found)\n");
return -EINVAL;
}
*outp = fdt64_to_cpu(cell[0]);
- dm_warn("%#llx (%llu)\n", (unsigned long long)*outp,
- (unsigned long long)*outp);
+ log_debug("%#llx (%llu)\n", (unsigned long long)*outp,
+ (unsigned long long)*outp);
return 0;
}
bool prop;
assert(ofnode_valid(node));
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
prop = ofnode_has_property(node, propname);
- dm_warn("%s\n", prop ? "true" : "false");
+ log_debug("%s\n", prop ? "true" : "false");
return prop ? true : false;
}
int len;
assert(ofnode_valid(node));
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
if (ofnode_is_np(node)) {
struct property *prop = of_find_property(
propname, &len);
}
if (!val) {
- dm_warn("<not found>\n");
+ log_debug("<not found>\n");
if (sizep)
*sizep = -FDT_ERR_NOTFOUND;
return NULL;
dm_warn("<invalid>\n");
return NULL;
}
- dm_warn("%s\n", str);
+ log_debug("%s\n", str);
return str;
}
ofnode subnode;
assert(ofnode_valid(node));
- dm_warn("%s: %s: ", __func__, subnode_name);
+ log_debug("%s: %s: ", __func__, subnode_name);
if (ofnode_is_np(node)) {
struct device_node *np = ofnode_to_np(node);
ofnode_to_offset(node), subnode_name);
subnode = noffset_to_ofnode(node, ooffset);
}
- dm_warn("%s\n", ofnode_valid(subnode) ?
- ofnode_get_name(subnode) : "<none>");
+ log_debug("%s\n", ofnode_valid(subnode) ?
+ ofnode_get_name(subnode) : "<none>");
return subnode;
}
u32 *out_values, size_t sz)
{
assert(ofnode_valid(node));
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
if (ofnode_is_np(node)) {
return of_read_u32_array(ofnode_to_np(node), propname,
if (!prop)
return ofnode_null();
- dm_warn("%s: node_path: %s\n", __func__, prop);
+ log_debug("%s: node_path: %s\n", __func__, prop);
return ofnode_path(prop);
}
int len;
int ret = -ENOENT;
- dm_warn("%s: %s: ", __func__, propname);
+ log_debug("%s: %s: ", __func__, propname);
/*
* If we follow the pci bus bindings strictly, we should check
int i;
for (i = 0; i < num; i++) {
- dm_warn("pci address #%d: %08lx %08lx %08lx\n", i,
- (ulong)fdt32_to_cpu(cell[0]),
- (ulong)fdt32_to_cpu(cell[1]),
- (ulong)fdt32_to_cpu(cell[2]));
+ log_debug("pci address #%d: %08lx %08lx %08lx\n", i,
+ (ulong)fdt32_to_cpu(cell[0]),
+ (ulong)fdt32_to_cpu(cell[1]),
+ (ulong)fdt32_to_cpu(cell[2]));
if ((fdt32_to_cpu(*cell) & type) == type) {
const unaligned_fdt64_t *ptr;
ret = -EINVAL;
fail:
- dm_warn("(not found)\n");
+ log_debug("(not found)\n");
return ret;
}
{
assert(ofnode_valid(node));
- dm_warn("%s: %s = %s", __func__, propname, value);
+ log_debug("%s: %s = %s", __func__, propname, value);
return ofnode_write_prop(node, propname, value, strlen(value) + 1,
false);