From 2a9caba1ceff85c7c07dcb43d48b4c8cf8c79f5e Mon Sep 17 00:00:00 2001
From: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Date: Thu, 18 Nov 2021 13:05:24 +0100
Subject: [PATCH] net: gem: Reduce timeout of mdio phy idle status check

Timeout for checking mdio phy idle status is 20seconds. In case of errors
this timeout will be too much. Reduce it to 100ms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Link: https://lore.kernel.org/r/1b73aa57b77587391e1bcd6d9f0480163367ed1b.1637237121.git.michal.simek@xilinx.com
---
 drivers/net/zynq_gem.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index 336d569b37..b751d28e61 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -112,6 +112,8 @@
 
 #define ZYNQ_GEM_DCFG_DBG6_DMA_64B	BIT(23)
 
+#define MDIO_IDLE_TIMEOUT_MS		100
+
 /* Use MII register 1 (MII status register) to detect PHY */
 #define PHY_DETECT_REG  1
 
@@ -228,7 +230,7 @@ static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
 	int err;
 
 	err = wait_for_bit_le32(&regs->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK,
-				true, 20000, false);
+				true, MDIO_IDLE_TIMEOUT_MS, false);
 	if (err)
 		return err;
 
@@ -241,7 +243,7 @@ static int phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum,
 	writel(mgtcr, &regs->phymntnc);
 
 	err = wait_for_bit_le32(&regs->nwsr, ZYNQ_GEM_NWSR_MDIOIDLE_MASK,
-				true, 20000, false);
+				true, MDIO_IDLE_TIMEOUT_MS, false);
 	if (err)
 		return err;
 
-- 
2.39.5