From: Poddar, Sourav <sourav.poddar@ti.com>
Date: Thu, 3 Apr 2014 11:52:54 +0000 (-0400)
Subject: spi: ti_qspi: Add delay for successful bulk erase.
X-Git-Tag: v2025.01-rc5-pxa1908~15361^2~3^2~27
X-Git-Url: http://git.dujemihanovic.xyz/img/%7B%7B%20%24style.RelPermalink%20%7D%7D?a=commitdiff_plain;h=b545a98f5dc563;p=u-boot.git

spi: ti_qspi: Add delay for successful bulk erase.

Bulk erase is not happening properly on dra7 due to erase timing constraints,
add a delay so that erase timing constraints are properly met.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Tested-by: Yebio Mesfin <ymesfin@ti.com>
---

diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index dfa5d0ca21..c5d2245e44 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -314,6 +314,9 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 			qslave->cmd |= QSPI_RD_SNGL;
 			debug("rx cmd %08x dc %08x\n",
 			      qslave->cmd, qslave->dc);
+			#ifdef CONFIG_DRA7XX
+				udelay(500);
+			#endif
 			writel(qslave->cmd, &qslave->base->cmd);
 			status = readl(&qslave->base->status);
 			timeout = QSPI_TIMEOUT;