strmhz(buf3, gd->arch.flb_clk));
#ifdef CONFIG_PCI
printf(" PCI CLK %s MHz INP CLK %s MHz VCO CLK %s MHz\n",
- strmhz(buf1, gd->pci_clk),
+ strmhz(buf1, gd->arch.pci_clk),
strmhz(buf2, gd->arch.inp_clk),
strmhz(buf3, gd->arch.vco_clk));
#else
#if defined(CONFIG_FSL_ESDHC)
unsigned long sdhc_per_clk;
#endif
+ /** @pci_clk: PCI clock rate in Hz */
+ unsigned long pci_clk;
};
#include <asm-generic/global_data.h>
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
if (IS_ENABLED(CONFIG_PCI))
- bd->bi_pcifreq = gd->pci_clk;
+ bd->bi_pcifreq = gd->arch.pci_clk;
#if defined(CONFIG_EXTRA_CLOCK)
bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
do_fixup_by_path(blob, path, "bus-range",
&tmp, sizeof(tmp), 1);
- tmp[0] = cpu_to_be32(gd->pci_clk);
+ tmp[0] = cpu_to_be32(gd->arch.pci_clk);
do_fixup_by_path(blob, path, "clock-frequency",
&tmp, sizeof(tmp[0]), 1);
}
do_fixup_by_path(blob, path, "bus-range",
&tmp, sizeof(tmp), 1);
- tmp[0] = cpu_to_be32(gd->pci_clk);
+ tmp[0] = cpu_to_be32(gd->arch.pci_clk);
do_fixup_by_path(blob, path, "clock-frequency",
&tmp, sizeof(tmp[0]), 1);
}
#if defined(CONFIG_ARCH_MPC837X)
gd->arch.sata_clk = sata_clk;
#endif
- gd->pci_clk = pci_sync_in;
+ gd->arch.pci_clk = pci_sync_in;
gd->cpu_clk = gd->arch.core_clk;
gd->bus_clk = gd->arch.csb_clk;
return 0;
#if defined(CONFIG_LWMON5)
unsigned long kbd_status;
#endif
+ /** @pci_clk: PCI clock rate in Hz */
+ unsigned long pci_clk;
};
#include <asm-generic/global_data.h>
gd->mem_clk = priv->speed[MPC83XX_CLK_MEM];
if (mpc83xx_has_pci(type))
- gd->pci_clk = priv->speed[MPC83XX_CLK_PCI];
+ gd->arch.pci_clk = priv->speed[MPC83XX_CLK_PCI];
gd->cpu_clk = priv->speed[MPC83XX_CLK_CORE];
gd->bus_clk = priv->speed[MPC83XX_CLK_CSB];
* @bus_clk: platform clock rate in Hz
*/
unsigned long bus_clk;
- /**
- * @pci_clk: PCI clock rate in Hz
- */
- /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
- unsigned long pci_clk;
/**
* @mem_clk: memory clock rate in Hz
*/