]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
video: tegra20: dc: parameterize V- and H-sync polarities
authorSvyatoslav Ryhel <clamor95@gmail.com>
Tue, 23 Jan 2024 17:16:27 +0000 (19:16 +0200)
committerAnatolij Gustschin <agust@denx.de>
Sun, 21 Apr 2024 07:07:01 +0000 (09:07 +0200)
Based on Thierry Reding's Linux commit:

'commit 1716b1891e1de05e2c20ccafa9f58550f3539717
("drm/tegra: rgb: Parameterize V- and H-sync polarities")'

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
arch/arm/include/asm/arch-tegra/dc.h
drivers/video/tegra20/tegra-dc.c

index 6444af2993a033de27285102bc66be9b3b551a39..ca3718411abcca07b204fe2d94949933351ed9e6 100644 (file)
@@ -443,6 +443,11 @@ enum win_color_depth_id {
 #define        WINDOW_D_SELECT         BIT(7)
 #define        WINDOW_H_SELECT         BIT(8)
 
+/* DC_COM_PIN_OUTPUT_POLARITY1 0x307 */
+#define LHS_OUTPUT_POLARITY_LOW                BIT(30)
+#define LVS_OUTPUT_POLARITY_LOW                BIT(28)
+#define LSC0_OUTPUT_POLARITY_LOW       BIT(24)
+
 /* DC_DISP_DISP_WIN_OPTIONS 0x402 */
 #define        CURSOR_ENABLE           BIT(16)
 #define        SOR_ENABLE              BIT(25)
index 10ad21efb0f00aff546bfd28cf385b95d054c19f..d073da7d7d43c6f324f18c3ac8bae3bddd7e67ce 100644 (file)
@@ -218,8 +218,11 @@ static const u32 rgb_sel_tab[PIN_OUTPUT_SEL_COUNT] = {
        0x00020000,
 };
 
-static void rgb_enable(struct dc_com_reg *com)
+static void rgb_enable(struct tegra_lcd_priv *priv)
 {
+       struct dc_com_reg *com = &priv->dc->com;
+       struct display_timing *dt = &priv->timing;
+       u32 value;
        int i;
 
        for (i = 0; i < PIN_REG_COUNT; i++) {
@@ -228,6 +231,21 @@ static void rgb_enable(struct dc_com_reg *com)
                writel(rgb_data_tab[i], &com->pin_output_data[i]);
        }
 
+       /* configure H- and V-sync signal polarities */
+       value = readl(&com->pin_output_polarity[1]);
+
+       if (dt->flags & DISPLAY_FLAGS_HSYNC_LOW)
+               value |= LHS_OUTPUT_POLARITY_LOW;
+       else
+               value &= ~LHS_OUTPUT_POLARITY_LOW;
+
+       if (dt->flags & DISPLAY_FLAGS_VSYNC_LOW)
+               value |= LVS_OUTPUT_POLARITY_LOW;
+       else
+               value &= ~LVS_OUTPUT_POLARITY_LOW;
+
+       writel(value, &com->pin_output_polarity[1]);
+
        for (i = 0; i < PIN_OUTPUT_SEL_COUNT; i++)
                writel(rgb_sel_tab[i], &com->pin_output_sel[i]);
 }
@@ -327,7 +345,7 @@ static int tegra_display_probe(struct tegra_lcd_priv *priv,
                basic_init_timer(&priv->dc->disp);
 
        if (priv->soc->has_rgb)
-               rgb_enable(&priv->dc->com);
+               rgb_enable(priv);
 
        if (priv->pixel_clock)
                update_display_mode(priv);