Khem Raj [Sat, 27 Jan 2024 22:54:59 +0000 (14:54 -0800)]
video: dw_hdmi: Fix compiler warnings with gcc-14
GCC-14 find more warnings like
"make pointer from integer without a cast"
fix them by adding a type cast.
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Jagan Teki [Wed, 17 Jan 2024 07:51:54 +0000 (13:21 +0530)]
configs: Enable HDMI Out for ROC-RK3328-CC
U-Boot
2024.01-00901-g75d07e0e6e-dirty (Jan 17 2024 - 12:50:56 +0530)
Model: Firefly roc-rk3328-cc
DRAM: 4 GiB
PMIC: RK8050 (on=0x40, off=0x00)
Core: 236 devices, 26 uclasses, devicetree: separate
MMC: mmc@
ff500000: 1, mmc@
ff520000: 0
Loading Environment from MMC... *** Warning - bad CRC, using default environment
In: serial,usbkbd
Out: serial,vidconsole
Err: serial,vidconsole
Model: Firefly roc-rk3328-cc
Net: eth0: ethernet@
ff540000
Hit any key to stop autoboot: 0
=> dm tree
Class Index Probed Driver Name
-----------------------------------------------------------
root 0 [ + ] root_driver root_driver
firmware 0 [ ] psci |-- psci
clk 0 [ + ] fixed_clock |-- xin24m
syscon 0 [ + ] rockchip_rk3328_grf |-- syscon@
ff100000
serial 0 [ + ] ns16550_serial |-- serial@
ff130000
i2c 0 [ + ] rockchip_rk3066_i2c |-- i2c@
ff160000
pmic 0 [ + ] rockchip_rk805 | `-- pmic@18
sysreset 0 [ ] rk8xx_sysreset | |-- rk8xx_sysreset
regulator 0 [ + ] rk8xx_buck | |-- DCDC_REG1
regulator 1 [ + ] rk8xx_buck | |-- DCDC_REG2
regulator 2 [ + ] rk8xx_buck | |-- DCDC_REG3
regulator 3 [ + ] rk8xx_buck | |-- DCDC_REG4
regulator 4 [ + ] rk8xx_ldo | |-- LDO_REG1
regulator 5 [ + ] rk8xx_ldo | |-- LDO_REG2
regulator 6 [ + ] rk8xx_ldo | `-- LDO_REG3
video 0 [ + ] rk3328_vop |-- vop@
ff370000
vidconsole 0 [ + ] vidconsole0 | `-- vop@
ff370000.vidconsole0
display 0 [ + ] rk3328_hdmi_rockchip |-- hdmi@
ff3c0000
phy 0 [ + ] inno_hdmi_phy |-- phy@
ff430000
clk 1 [ + ] rockchip_rk3328_cru |-- clock-controller@
ff440000
sysreset 1 [ ] rockchip_sysreset | |-- sysreset
reset 0 [ + ] rockchip_reset | `-- reset
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 17 Jan 2024 07:51:53 +0000 (13:21 +0530)]
configs: evb-rk3328: Enable vidconsole for rk3328
Enable video console for Rockchip RK3328.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 17 Jan 2024 07:51:52 +0000 (13:21 +0530)]
rockchip: Enable preconsole for rk3328
Enable and set the start address of pre-console buffer for RK3328.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 17 Jan 2024 07:51:51 +0000 (13:21 +0530)]
ARM: dts: rk3328: Enable VOP for bootph-all
Model: Firefly roc-rk3328-cc
DRAM: 1 GiB (effective 1022 MiB)
Video device 'vop@
ff370000' cannot allocate frame buffer memory -ensure the device is set up before relocation
Error binding driver 'rockchip_rk3328_vop': -28
Some drivers failed to bind
initcall sequence
000000003ffcd5e8 failed at call
000000000021a5c4 (err=-28)
### ERROR ### Please RESET the board ###
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 17 Jan 2024 07:51:50 +0000 (13:21 +0530)]
video: rockchip: Add rk3328 vop support
Add support for Rockchip RK3328 VOP.
Require VOP cleanup before handoff to Linux by writing reset values to
WIN registers. Without this Linux VOP trigger page fault as below
[ 0.752016] Loading compiled-in X.509 certificates
[ 0.787796] inno_hdmi_phy_rk3328_clk_recalc_rate: parent
24000000
[ 0.788391] inno-hdmi-phy
ff430000.phy: inno_hdmi_phy_rk3328_clk_recalc_rate rate
148500000 vco
148500000
[ 0.798353] rockchip-drm display-subsystem: bound
ff370000.vop (ops vop_component_ops)
[ 0.799403] dwhdmi-rockchip
ff3c0000.hdmi: supply avdd-0v9 not found, using dummy regulator
[ 0.800288] rk_iommu
ff373f00.iommu: Enable stall request timed out, status: 0x00004b
[ 0.801131] dwhdmi-rockchip
ff3c0000.hdmi: supply avdd-1v8 not found, using dummy regulator
[ 0.802056] rk_iommu
ff373f00.iommu: Disable paging request timed out, status: 0x00004b
[ 0.803233] dwhdmi-rockchip
ff3c0000.hdmi: Detected HDMI TX controller v2.11a with HDCP (inno_dw_hdmi_phy2)
[ 0.805355] dwhdmi-rockchip
ff3c0000.hdmi: registered DesignWare HDMI I2C bus driver
[ 0.808769] rockchip-drm display-subsystem: bound
ff3c0000.hdmi (ops dw_hdmi_rockchip_ops)
[ 0.810869] [drm] Initialized rockchip 1.0.0
20140818 for display-subsystem on minor 0
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Jagan Teki [Wed, 17 Jan 2024 07:51:49 +0000 (13:21 +0530)]
video: rockchip: Add rk3328 hdmi support
Add Rockchip RK3328 HDMI Out driver.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Jagan Teki [Wed, 17 Jan 2024 07:51:48 +0000 (13:21 +0530)]
phy: rockchip: Add Rockchip INNO HDMI PHY driver
Add Rockchip INNO HDMI PHY driver for RK3328.
Reference from linux-next phy-rockchip-inno-hdmi driver.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Jagan Teki [Wed, 17 Jan 2024 07:51:47 +0000 (13:21 +0530)]
clk: rk3328: Add get hdmiphy clock
Add support to get the hdmiphy clock for RK3328 PCLK_HDMIPHY.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Jagan Teki [Wed, 17 Jan 2024 07:51:46 +0000 (13:21 +0530)]
clk: rockchip: rk3328: Add VOP clk support
VOP get and set clock would needed for VOP drivers.
Add support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Jagan Teki [Wed, 17 Jan 2024 07:51:45 +0000 (13:21 +0530)]
video: rockchip: vop: Add dsp offset support
Unlike RK3399, RK3288 the Newer Rockchip SoC's like RK3328 have
different offsets for dsp registers.
Group the dsp register set via dsp_regs pointers so that dsp_offset
would point the dsp_regs to access for any changes in the offset value.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Jagan Teki [Wed, 17 Jan 2024 07:51:44 +0000 (13:21 +0530)]
video: rockchip: vop: Add win offset support
Unlike RK3399, RK3288 the Newer Rockchip SoC's like RK3328 have
different offsets for win registers.
Group the win register set via win_regs pointers so that win_offset
would point the win_regs to access for any changes in the offset value.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Jagan Teki [Wed, 17 Jan 2024 07:51:43 +0000 (13:21 +0530)]
video: rockchip: vop: Simplify rkvop_enable
Get the regs from priv pointer instead of passing it an argument.
This would simplify the code and better readability.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Jagan Teki [Wed, 17 Jan 2024 07:51:42 +0000 (13:21 +0530)]
video: dw_hdmi: Add setup_hpd hook
Add support for DW HDMI Setup HPD status.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Jagan Teki [Wed, 17 Jan 2024 07:51:41 +0000 (13:21 +0530)]
video: dw_hdmi: Add read_hpd hook
Add support for DW HDMI Read HPD status.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Jagan Teki [Wed, 17 Jan 2024 07:51:40 +0000 (13:21 +0530)]
video: dw_hdmi: Extend the HPD detection
HPD detection on some DW HDMI designed SoC's would need to read and
setup the HPD status explicitly.
So, extend the HPD detection code by adding the dw_hdmi_detect_hpd
function and move the default detection code caller there.
The new read and setup hdp will integrate the same function in
later patches.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Jagan Teki [Wed, 17 Jan 2024 07:51:39 +0000 (13:21 +0530)]
video: dw_hdmi: Add Vendor PHY handling
DW HDMI support Vendor PHY like Rockchip RK3328 Inno HDMI PHY.
Extend the vendor phy handling by adding platform phy hooks.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Jagan Teki [Wed, 17 Jan 2024 07:51:38 +0000 (13:21 +0530)]
video: rockchip: hdmi: Detect hpd after controller init
HDP is a hardware connector event, so detect the same once the
controller and attached PHY initialization are done.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Svyatoslav Ryhel [Mon, 8 Jan 2024 16:45:01 +0000 (18:45 +0200)]
video: simple_panel: add EDID support
Support timing parsing from EDID if panel device tree node
provides DDC i2c bus instead of timings node.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF201
Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
[agust: reworked to fix dm_i2c_* build errors and to big img size]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Svyatoslav Ryhel [Mon, 8 Jan 2024 16:45:00 +0000 (18:45 +0200)]
video: simple_panel: simplify platform data pass
Pass MIPI DSI platform data to simple DSI panel directly
from driver data on panel probe.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Tom Rini [Fri, 19 Apr 2024 13:28:43 +0000 (07:28 -0600)]
Merge tag 'u-boot-stm32-
20240419' of https://source.denx.de/u-boot/custodians/u-boot-stm
MP1:
_ Add OHCI HCD support for STM32MP15xx DHSOM
_ Report OTP-CLOSED instead of rev.? on closed STM32MP15xx
_ Initialize TAMP_SMCR BKP..PROT fields on STM32MP15xx
_ Jump to ep on successful resume in PSCI suspend code
_ Add FASTBOOT support for STM32MP13
_ Fix/Rework key and leds management for STM32MP13/15
_ net: dwc_eth_qos: Clean up STM32 glue code and add STM32MP13xx support
MP2:
_ Add stm32-fmc-ebi support
_ Add: sdmmc2 support and fix AARCH64 compilation
Tom Rini [Fri, 19 Apr 2024 13:28:24 +0000 (07:28 -0600)]
Merge tag 'u-boot-dfu-
20240419' of https://source.denx.de/u-boot/custodians/u-boot-dfu
u-boot-dfu-
20240419
- new "fastboot oem board" command
Patrice Chotard [Tue, 9 Apr 2024 15:02:15 +0000 (17:02 +0200)]
ARM: dts: stm32: Add led-blue for stm32mp157c-ed1-scmi-u-boot
The blue led is used to indicate U-Boot entering / exit indication
then Linux heartbeat.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:14 +0000 (17:02 +0200)]
ARM: dts: stm32: Update red led node for stm32mp157c-ed1-scmi-u-boot
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use led node's name instead for
u-boot,error-led property.
Rename red led node's name to led-red.
Remove status property which is useless.
Add compatible = "gpio-leds"; which is not present in kernel DT.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:13 +0000 (17:02 +0200)]
ARM: dts: stm32: Don't probe red led at boot for stm32mp157c-ed1-scmi-u-boot
red led and button dedicated to fastboot share the same gpio GPIOA13.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from red led node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:12 +0000 (17:02 +0200)]
ARM: dts: stm32: Add gpio-keys for stm32mp157c-ed1-scmi-u-boot
Add 2 gpio-keys :
_ button-user-1 for stm32prog mode activation.
_ button-user-2 for fastboot mode activation.
Remove proprietary st,fastboot-gpios and st,stm32prog-gpios.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:11 +0000 (17:02 +0200)]
ARM: dts: stm32: Add led-blue for stm32mp157c-ed1-u-boot
The blue led is used to indicate U-Boot entering / exit indication
then Linux heartbeat.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:10 +0000 (17:02 +0200)]
ARM: dts: stm32: Update red led node for stm32mp157c-ed1-u-boot
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use led node's name instead for
u-boot,error-led property.
Rename red led node's name to led-red.
Remove status property which is useless.
Add compatible = "gpio-leds" which is not present in kernel DT.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:09 +0000 (17:02 +0200)]
ARM: dts: stm32: Don't probe red led at boot for stm32mp157c-ed1-u-boot
red led and button dedicated to fastboot share the same gpio GPIOA13.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from red led node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:08 +0000 (17:02 +0200)]
ARM: dts: stm32: Add gpio-keys for stm32mp157c-ed1-u-boot
Add 2 gpio-keys :
_ button-user-1 for stm32prog mode activation.
_ button-user-2 for fastboot mode activation.
Remove proprietary st,fastboot-gpios and st,stm32prog-gpios.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:07 +0000 (17:02 +0200)]
ARM: dts: stm32: Update u-boot, boot-led for stm32mp157a-dk1-u-boot
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use blue led node's name instead
for u-boot,boot-led property.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:06 +0000 (17:02 +0200)]
ARM: dts: stm32: Update red led node for stm32mp157a-dk1-u-boot
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use red led node's name instead
for u-boot,error-led property.
Rename red led node's name to led-red.
Remove status property which is useless.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:05 +0000 (17:02 +0200)]
ARM: dts: stm32: Don't probe red led at boot for stm32mp157a-dk1-u-boot
red led and button dedicated to fastboot share the same gpio GPIOA13.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from red led node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:04 +0000 (17:02 +0200)]
ARM: dts: stm32: Add gpio-keys for stm32mp157a-dk1-u-boot
Instead of using "st,fastboot-gpios" and "st,stm32prog-gpios", declare
2 gpio-keys.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:03 +0000 (17:02 +0200)]
ARM: dts: stm32: Add led-blue for stm32mp157a-dk1-scmi-u-boot
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use blue led node's name instead
for u-boot,boot-led property.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:02 +0000 (17:02 +0200)]
ARM: dts: stm32: Update red led node for stm32mp157a-dk1-scmi-u-boot
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use red led node's name instead
for u-boot,error-led property.
Rename "red" led node's name to "led-red".
Remove status property which is useless.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:01 +0000 (17:02 +0200)]
ARM: dts: stm32: Don't probe red led at boot for stm32mp157a-dk1-scmi-u-boot
red led and button dedicated to fastboot share the same gpio GPIOA13.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from red led node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:02:00 +0000 (17:02 +0200)]
ARM: dts: stm32: Add gpio-keys for stm32mp157a-dk1-scmi-u-boot
Instead of using "st,fastboot-gpios" and "st,stm32prog-gpios", declare
2 gpio-keys.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:01:59 +0000 (17:01 +0200)]
ARM: dts: stm32: Clean led-red node for stm32mp135f-dk-u-boot
Remove "color" property from led-red node which is not supported
by U-Boot.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:01:58 +0000 (17:01 +0200)]
ARM: dts: stm32: Don't probe led-red/led-blue at boot for stm32mp135f-dk-u-boot
led-red and button dedicated to fastboot share the same gpio GPIOA13.
led-blue and button dedicated to stm32prog share the same gpio GPIOA14.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from led-red and
led-blue led's node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:01:57 +0000 (17:01 +0200)]
ARM: dts: stm32: Add gpio-keys for stm32mp135f-dk-u-boot
Add 2 gpio-keys :
_ button-user-1 for stm32prog mode activation.
_ update button-user's label (defined in kernel DT) to match label
requested in board_key_check() for fastboot mode activation.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:01:56 +0000 (17:01 +0200)]
board: st: stmp32mp1: Use BUTTON UCLASS in board_key_check()
Instead of using gpio directly to detect key pressed on button
dedicated for fastboot and stm32mprog, make usage of BUTTON UCLASS.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:01:55 +0000 (17:01 +0200)]
configs: stm32mp1: Enable BUTTON_GPIO flag for stm32mp13_defconfig
Enable BUTTON_GPIO flag for STM32MP15.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Patrice Chotard [Tue, 9 Apr 2024 15:01:54 +0000 (17:01 +0200)]
configs: stm32mp1: Enable BUTTON_GPIO flag for stm32mp15_trusted_defconfig
Enable BUTTON_GPIO flag for STM32MP15.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:01:53 +0000 (17:01 +0200)]
configs: stm32mp1: Enable BUTTON_GPIO flag for stm32mp15_basic_defconfig
Enable BUTTON_GPIO flag for STM32MP15.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:01:52 +0000 (17:01 +0200)]
configs: stm32mp1: Enable BUTTON_GPIO flag for stm32mp15_defconfig
Enable BUTTON_GPIO flag for STM32MP15.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Tue, 9 Apr 2024 15:01:51 +0000 (17:01 +0200)]
configs: stm32mp13: Enable FASTBOOT
Enable FASTBOOT relative flags for stm32mp13_defconfig.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Patrice Chotard [Fri, 8 Mar 2024 14:26:14 +0000 (15:26 +0100)]
mmc: stm32_sdmmc2: Fix AARCH64 compilation warnings
When building with AARCH64 defconfig, we got warnings, fix them.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Patrick Delaunay [Fri, 8 Mar 2024 14:26:13 +0000 (15:26 +0100)]
mmc: stm32_sdmmc2: Add "st,stm32mp25-sdmmc2" compatible
Add compatible used for STM32MP25 family.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Patrice Chotard [Fri, 8 Mar 2024 13:50:09 +0000 (14:50 +0100)]
ARM: dts: stm32: Fix partition node name for stm32mp15xx-dhcom-u-boot
Fix flash@0 partition node name with correct offset.
Fixes: 90f992e6a58c ("arm: dts: stm32: Add partitions in flash0 and nand
node for stm32mp15xx-dhcom/dhcor")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 8 Mar 2024 13:50:08 +0000 (14:50 +0100)]
ARM: dts: stm32: Fix partition node name for stm32mp15xx-dhcor-u-boot
Fix flash@0 partition node name with correct offset.
Fixes: 90f992e6a58c ("arm: dts: stm32: Add partitions in flash0 and nand node for
stm32mp15xx-dhcom/dhcor")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Fri, 8 Mar 2024 13:50:07 +0000 (14:50 +0100)]
ARM: dts: stm32: Fix partition node name for stm32mp157c-ev1-u-boot
Fix flash@0 and nand@0 partition node name with correct offset.
Fixes: e91d3c61767b ("arm: dts: stm32: Add partitions in flash0 and nand
node for stm32mp15xx-ev1")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Fri, 19 Apr 2024 03:59:05 +0000 (05:59 +0200)]
ARM: stm32: Initialize TAMP_SMCR BKP..PROT fields on STM32MP15xx
In case of an OTP-CLOSED STM32MP15xx system, the CPU core 1 cannot be
released from endless loop in BootROM only by populating TAMP BKPxR 4
and 5 with magic and branch address and sending SGI0 interrupt from
core 0 to core 1 twice. TAMP_SMCR BKP..PROT fields must be initialized
as well to release the core 1 from endless loop during the second SGI0
handling on core 1. Initialize TAMP_SMCR to protect the first 32 backup
registers, the ones which contain the core 1 magic, branch address and
boot information.
This requirement seems to be undocumented, therefore it was necessary
to trace and analyze the STM32MP15xx BootROM using OpenOCD and objdump.
Ultimately, it turns out that a certain BootROM function reads out the
TAMP_SMCR register and tests whether the BKP..PROT fields are non-zero.
If they are zero, the BootROM code again waits for SGI0 using WFI, else
the execution moves forward until it reaches handoff to the TAMP BKPxR 5
branch address.
This fixes CPU core 1 release using U-Boot PSCI implementation on an
OTP-CLOSED system, i.e. system with fuse 0 bit 6 set.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Sun, 14 Apr 2024 18:39:29 +0000 (20:39 +0200)]
ARM: stm32: Report OTP-CLOSED instead of rev.? on closed STM32MP15xx
SoC revision is only accessible via DBUMCU IDC register,
which requires BSEC.DENABLE DBGSWENABLE bit to be set to
make the register accessible, otherwise an access to the
register triggers bus fault. As BSEC.DBGSWENABLE is zero
in case of an OTP-CLOSED system, do NOT set DBGSWENABLE
bit as this might open a brief window for timing attacks.
Instead, report that this system is OTP-CLOSED and do not
report any SoC revision to avoid confusing users. Use an
SEC/C abbreviation to avoid growing SOC_NAME_SIZE .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Sun, 14 Apr 2024 18:38:31 +0000 (20:38 +0200)]
ARM: stm32: Drop superfluous Makefile entry for ecdsa_romapi.o
The source file is in arch/arm/mach-stm32mp/ecdsa_romapi.c and not
in arch/arm/mach-stm32mp/stm32mp1/ecdsa_romapi.c . There are two
Makefile entries in each subdirectory. Drop the bogus one and keep
only the correct one, the one in arch/arm/mach-stm32mp/Makefile .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Sun, 7 Apr 2024 20:21:07 +0000 (22:21 +0200)]
ARM: stm32: Jump to ep on successful resume in PSCI suspend code
In case the system has resumed successfully, the PSCI suspend resume
code has to jump to the 'ep' successful resume entry point code path,
otherwise the code has to jump to content of the LR register, which
points to failed resume code path.
To implement this distinction, rewrite LR register stored on stack
with 'ep' value in case of a successful resume, which is really in
every case unless some catastrophic failure occurred during suspend.
Without this change, Linux counts every resume as failed in
/sys/power/suspend_stats/fail
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Tue, 26 Mar 2024 12:07:32 +0000 (13:07 +0100)]
net: dwc_eth_qos: Add support for st, ext-phyclk property
The "st,ext-phyclk" property is a unification of "st,eth-clk-sel"
and "st,eth-ref-clk-sel" properties. All three properties define
ETH CK clock direction, however:
- "st,eth-clk-sel" selects clock direction for GMII/RGMII mode
- "st,eth-ref-clk-sel" selects clock direction for RMII mode
- "st,ext-phyclk" selects clock direction for all RMII/GMII/RGMII modes
The "st,ext-phyclk" is the preferrable property to use.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christophe ROULLIER <christophe.roullier@foss.st.com>
Christophe Roullier [Tue, 26 Mar 2024 12:07:31 +0000 (13:07 +0100)]
net: dwc_eth_qos: Add support of STM32MP13xx platform
Add compatible "st,stm32mp13-dwmac" to manage STM32MP13 boards.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Marek Vasut <marex@denx.de> # Rebase, reshuffle, squash code
Reviewed-by: Christophe ROULLIER <christophe.roullier@foss.st.com>
Christophe Roullier [Tue, 26 Mar 2024 12:07:30 +0000 (13:07 +0100)]
net: dwc_eth_qos: Add DT parsing for STM32MP13xx platform
Manage 2 ethernet instances, select which instance to configure with mask
If mask is not present in DT, it is stm32mp15 platform.
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Marek Vasut <marex@denx.de> # Rework the code
Reviewed-by: Christophe ROULLIER <christophe.roullier@foss.st.com>
Marek Vasut [Tue, 26 Mar 2024 12:07:29 +0000 (13:07 +0100)]
net: dwc_eth_qos: Constify st, eth-* values parsed out of DT
Use const bool for the values parsed out of DT. Drop the duplicate
assignment of false into those bool variables, assign them directly
with the content parsed out of DT. Abbreviate the variable name too.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 26 Mar 2024 12:07:28 +0000 (13:07 +0100)]
net: dwc_eth_qos: Use consistent logging prints
Use dev_*() only to print all the logs from this glue code,
instead of mixing dev_*(), log_*(), pr_*() all in one code.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 26 Mar 2024 12:07:27 +0000 (13:07 +0100)]
net: dwc_eth_qos: Move log_debug statements on top of case block
Move the log_debug() calls on top of the bit manipulation code.
No functional change.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 26 Mar 2024 12:07:26 +0000 (13:07 +0100)]
net: dwc_eth_qos: Use FIELD_PREP for ETH_SEL bitfield
Use FIELD_PREP to configure content of ETH_SEL bitfield in SYSCFG_PMCSETR
register. No functional change.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 26 Mar 2024 12:07:25 +0000 (13:07 +0100)]
net: dwc_eth_qos: Scrub ifdeffery
Replace ifdef CONFIG_CLK with if (CONFIG_IS_ENABLED(CLK)) to improve code
build coverage. Some of the functions printed debug("%s: OK\n", __func__);
on exit with and without CLK enabled, some did not, make it consistent and
print nothing if CLK is disabled.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christophe ROULLIER <christophe.roullier@foss.st.com>
Marek Vasut [Tue, 26 Mar 2024 12:07:24 +0000 (13:07 +0100)]
net: dwc_eth_qos: Fold board_interface_eth_init into STM32 glue code
Move board_interface_eth_init() into eqos_probe_syscfg_stm32() in STM32
driver glue code. The eqos_probe_syscfg_stm32() parses STM32 specific DT
properties of this MAC and configures SYSCFG registers accordingly, there
is nothing board specific happening in this function, move it into generic
driver code instead. Drop the now unused duplicates from board files.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 26 Mar 2024 12:07:23 +0000 (13:07 +0100)]
net: dwc_eth_qos: Rename eqos_stm32_config to eqos_stm32mp15_config
The current glue code is specific to STM32MP15xx, the upcoming STM32MP13xx
will introduce another entry specific to the STM32MP13xx. Rename the current
entry to eqos_stm32mp15_config in preparation for STM32MP13xx addition. No
functional change.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christophe ROULLIER <christophe.roullier@foss.st.com>
Marek Vasut [Tue, 26 Mar 2024 12:07:22 +0000 (13:07 +0100)]
net: dwc_eth_qos: Split STM32 glue into separate file
Move STM32 glue code into separate file to contain the STM32 specific
code outside of the DWMAC core code. No functional change.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christophe ROULLIER<christophe.roullier@foss.st.com>
Christophe Kerello [Wed, 6 Mar 2024 09:54:06 +0000 (10:54 +0100)]
mtd: rawnand: stm32_fmc2: add MP25 support
FMC2 IP supports up to 4 chip select. On MP1 SoC, only 2 of them are
available when on MP25 SoC, the 4 chip select are available.
Let's use a platform data structure for parameters that will differ.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Christophe Kerello [Wed, 6 Mar 2024 09:50:47 +0000 (10:50 +0100)]
memory: stm32-fmc2-ebi: add MP25 RIF support
The FMC2 revision 2 supports security and isolation compliant with
the Resource Isolation Framework (RIF). From RIF point of view,
the FMC2 is composed of several independent resources, listed below,
which can be assigned to different security and compartment domains:
- 0: Common FMC_CFGR register.
- 1: EBI controller for Chip Select 1.
- 2: EBI controller for Chip Select 2.
- 3: EBI controller for Chip Select 3.
- 4: EBI controller for Chip Select 4.
- 5: NAND controller.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Christophe Kerello [Wed, 6 Mar 2024 09:50:46 +0000 (10:50 +0100)]
memory: stm32-fmc2-ebi: add MP25 support
Add the support of the revision 2 of FMC2 IP.
- PCSCNTR register has been removed,
- CFGR register has been added,
- the bit used to enable the IP has moved from BCR1 to CFGR,
- the timeout for CEx deassertion has moved from PCSCNTR to BCRx,
- the continuous clock enable has moved from BCR1 to CFGR,
- the clk divide ratio has moved from BCR1 to CFGR.
The MP1 SoCs have only one signal to manage all the controllers (NWAIT).
The MP25 SOC has one RNB signal for the NAND controller and one NWAIT
signal for the memory controller.
Let's use a platform data structure for parameters that will differ
between MP1 and MP25.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Mon, 4 Mar 2024 18:25:43 +0000 (19:25 +0100)]
arm: stm32: Enable OHCI HCD support on STM32MP15xx DHSOM
The OHCI HCD is mandatory for USB 1.1 FS/LS device support, enable it.
This used to be enabled implicitly before, now that implicit dependency
disappeared and this got disabled. Enable it manually.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Wed, 7 Feb 2024 13:12:01 +0000 (14:12 +0100)]
stm32mp: cmd_stm32prog: add dependencies with USB_GADGET_DOWNLOAD
This patch avoids compilation issue when CONFIG_USB_GADGET is deactivated
in defconfig, with undefined reference to run_usb_dnl_gadget and to
g_dnl_set_product.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Quentin Schulz [Mon, 15 Apr 2024 12:43:57 +0000 (14:43 +0200)]
env: mmc: print MMC device being read
This prints the MMC device being read similar to how we print the MMC
device we write to when e.g. calling saveenv.
One of the side effects is that the boot log now shows from which MMC
device the env was loaded:
Loading Environment from MMC... Reading from MMC(1)... OK
This is useful to identify which MMC device the environment was loaded
from for boards where there are more than one (e.g. eMMC and SD card)
without adding some debug messages manually.
Sadly, there's no way to know which of the default or redundant
environment is being read from env_mmc_load before env_import_redund is
called so it is printing a bit later (and possibly after error/warning
messages).
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Michal Simek [Mon, 15 Apr 2024 08:20:05 +0000 (10:20 +0200)]
Kconfig: Remove all default n options
default n doesn't need to be specified. It is default option anyway.
Similar changes have been done by commit
18370f14975c ("Kconfig: Remove all
default n/no options").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Marek Vasut [Sun, 14 Apr 2024 18:37:20 +0000 (20:37 +0200)]
boot: fdt: Turn all addresses and sizes into u64
In case of systems where DRAM bank ends at the edge of 32bit boundary,
start + size calculations would overflow. This happens on STM32MP15xx
with 1 DRAM bank starting at 0xc0000000 and 1 GiB of DRAM. This is a
usual 32bit system DRAM size overflow, fix it by doing all DRAM size
and offset calculations using u64 types. This also covers a case where
a 32bit PAE system might be able to address up to 36bits of DRAM.
Fixes: a4df06e41fa2 ("boot: fdt: Change type of env_get_bootm_low() to phys_addr_t")
Signed-off-by: Marek Vasut <marex@denx.de>
Jianan Huang [Sun, 14 Apr 2024 15:04:14 +0000 (23:04 +0800)]
fs/erofs: add DEFLATE algorithm support
This patch adds DEFLATE compression algorithm support. It's a good choice
to trade off between compression ratios and performance compared to LZ4.
Alternatively, DEFLATE could be used for some specific files since EROFS
supports multiple compression algorithms in one image.
Signed-off-by: Jianan Huang <jnhuang95@gmail.com>
Reviewed-by: Gao Xiang <hsiangkao@linux.alibaba.com>
Charles Hardin [Fri, 12 Apr 2024 20:45:33 +0000 (13:45 -0700)]
net: add support to parse the NIS domain for the dhcp options
There is code in the bootp parsing for NIS domain and add the
same support for the dhcp options as well. This allows the same
usage of the data when the dhcp command is used in the boot
command.
Signed-off-by: Charles Hardin <ckhardin@gmail.com>
Caleb Connolly [Thu, 11 Apr 2024 17:52:37 +0000 (19:52 +0200)]
input: button_kbd: gracefully handle buttons that fail probe
If a button device fails to probe, it will still be added to the uclass
device list, and therefore will still be iterated over in
button_read_keys() resulting in a UAF on the buttons private data.
Resolve this by unbinding button devices that aren't active after
probing, and print a warning so it's clear that the button is broken.
Fixes: e8779962898e ("dm: input: add button_kbd driver")
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Heinrich Schuchardt [Tue, 9 Apr 2024 18:44:22 +0000 (20:44 +0200)]
reboot-mode: must depend on CONFIG_DM_RTC
Reading the boot mode from RTC memory requires a real time clock.
Add the missing Kconfig dependency.
Fixes: c74675bd904b ("reboot-mode: read the boot mode from RTC memory")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Gireesh Hiremath [Mon, 8 Apr 2024 06:01:19 +0000 (11:31 +0530)]
configs: am335x_guardian: store boot count in AM3352 RTC block
store bootcount in RTC block scratch register
Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>
Tom Rini [Thu, 18 Apr 2024 18:13:40 +0000 (12:13 -0600)]
Merge tag 'tpm-master-
18042024' of https://source.denx.de/u-boot/custodians/u-boot-tpm
Igor says:
"The problem initially was in the TEE sandbox driver implementation
(drivers/tee/sandbox.c) and it's limitations, which doesn't
permit to have multiple simultaneous sessions with different TAs.
This is what actually happened in this CI run [1], firstly "optee_rpmb"
cmd was executed (and after execution we had one session open), and
then "scp03", which also makes calls to OP-TEE, however it fails
in sandbox_tee_open_session() because of this check:
if (state->ta) {
printf("A session is already open\n");
return -EBUSY;
}
I had two ways in mind to address that:
1. Close a session on each optee_rpmb cmd invocation.
I don't see any reason to keep this session open, as obviously
there is no other mechanism (tbh, I don't know if DM calls ".remove" for active
devices) to close it automatically before handing over control to
Linux kernel. As a result we might end up with some orphaned sessions
registered in OP-TEE OS core (obvious resource leak).
2. Extend TEE sandbox driver, add support for multiple
simultaneous sessions just to handle the case.
I've chosen the first approach, as IMO it was "kill two birds with one stone",
I could address resource leak in OP-TEE and bypass limitations of
TEE sandbox driver."
Link: https://lore.kernel.org/u-boot/CAByghJZVRbnFUwJdgU534tvGA+DX2pArf0i7ySik=BrXgADe3Q@mail.gmail.com/
The CI https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/20414
showed no problems
Tom Rini [Thu, 18 Apr 2024 16:08:57 +0000 (10:08 -0600)]
Merge branch 'for-2024.07' of https://source.denx.de/u-boot/custodians/u-boot-mpc8xx
This pull request adds support for temperature sensors et FPGA loading
on boards from CS GROUP France.
CI: https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/20416
Tom Rini [Thu, 18 Apr 2024 14:29:35 +0000 (08:29 -0600)]
Revert "Merge patch series "pxe: Allow extlinux booting without CMDLINE enabled""
As reported by Jonas Karlman this series breaks booting on some AArch64
platforms with common use cases. For now the best path forward is to
revert the series.
This reverts commit
777c28460947371ada40868dc994dfe8537d7115, reversing
changes made to
ab3453e7b12daef47b9e91da2a2a3d48615dc6fc.
Link: https://lore.kernel.org/u-boot/50dfa3d6-a1ca-4492-a3fc-8d8c56b40b43@kwiboo.se/
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 18 Apr 2024 13:55:38 +0000 (07:55 -0600)]
Merge branch 'master-fdt' of https://source.denx.de/u-boot/custodians/u-boot-sh
Christophe Leroy [Sun, 14 Apr 2024 14:47:06 +0000 (16:47 +0200)]
board: cssi: Read and display MCR board address
MCR boards are plugged in racks. The position in the rack can be read
in a register.
For MCR3000, that's provided by the FPGA so check it is loaded before
reading the address.
For the other boards, the FPGA is loaded by hardware so it can be
read inconditionnaly.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Christophe Leroy [Sun, 14 Apr 2024 09:17:13 +0000 (11:17 +0200)]
board: cssi: Load FPGA on MCR3000 board
Unlike CMPC885 and CMPCPRO boards, the FPGA of MCR3000 board doesn't
load code automatically but needs to be loaded by software through SPI.
Until now it was loaded later by Linux, but we'd like U-boot to have
access to some information that require the FPGA, like board address
in racks.
So, implemented the load of FPGA in U-boot.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
To avoid spamming your email boxes, the code isn't included in
the emailed patch but will be present in the PULL request
Christophe Leroy [Sat, 13 Apr 2024 06:41:14 +0000 (08:41 +0200)]
board: cssi: Use HAVE_VENDOR_COMMON_LIB logic
Instead of cross using cross-directory makefile directives,
add a Makefile in board/cssi/common/ directory in order to
benefit from HAVE_VENDOR_COMMON_LIB logic.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Christophe Leroy [Fri, 12 Apr 2024 17:36:19 +0000 (19:36 +0200)]
spi: mpc8xx: Set up speed as requested
Set the speed requested through mpc8xx_spi_set_speed() instead
of hardcoding a fixed speed.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Christophe Leroy [Fri, 12 Apr 2024 16:16:59 +0000 (18:16 +0200)]
spi: mpc8xx: Use 16 bit mode for large transfers with even size
On CPM, the RISC core is a lot more efficiant when doing transfers
in 16-bits chunks than in 8-bits chunks, but unfortunately the
words need to be byte swapped.
So, for large tranfers with an even size, allocate a temporary
buffer and byte-swap data before and after transfer.
This change allows setting higher speed for transfer. For instance
on an MPC 8xx (CPM1 comms RISC processor), the documentation tells
that transfer in byte mode at 1 kbit/s uses 0.200% of CPM load
at 25 MHz while a word transfer at the same speed uses 0.032%
of CPM load. This means the speed can be 6 times higher in
word mode for the same CPM load.
For small transfers, the load reduction is not worth the CPU load
required to allocate the temporary buffer, so do it only when data
size is over 64 bytes.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Christophe Leroy [Fri, 12 Apr 2024 11:53:57 +0000 (13:53 +0200)]
spi: mpc8xx: Allow transfer of more than MAX_BUFFER len
Perform multiple transfer of size MAX_BUFFER when the data to be
transferred is longer than MAX_BUFFER.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Christophe Leroy [Fri, 12 Apr 2024 11:19:47 +0000 (13:19 +0200)]
powerpc: 8xx: Set SDMA configuration register correcly
SDMA configuration register needs to be set up only once and doesn't
belong to drivers. Also, the value to be used is different on mpc885.
So do the init in cpu_init_f() with 0x40 for mpc885 and 0x1 for others.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Christophe Leroy [Tue, 2 Apr 2024 17:22:24 +0000 (19:22 +0200)]
board: cssi: add support for reading temperature
All CSSI boards have an LM74 chip as temperature sensor.
Enable it.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Christophe Leroy [Fri, 12 Apr 2024 10:01:25 +0000 (12:01 +0200)]
board: cssi: Add support for SPI bus on MCR3000 board
MCR3000 board has some components tied to the SPI bus, like the Texas
Instruments LM74 temperature sensor.
Add support for SPI bus. The SPI chipselects are a bit special in the
way that they are driven by 3 bits in a register of the board's CPLD
where the value writen in those bits exclusively activates one of the
7 possible chipselects and value 0 sets all chipselets to inactive.
So add a special GPIO driver that simulates GPIOs for those chipselect.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Christophe Leroy [Tue, 2 Apr 2024 16:55:31 +0000 (18:55 +0200)]
thermal: Add support for TI LM74
LM74 is a SPI temperature sensor.
Implement a driver to read temperature from it.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Christophe Leroy [Tue, 9 Apr 2024 06:38:08 +0000 (08:38 +0200)]
spi: mpc8xx: Fix transfert when input or output buffer is NULL
xfer ops can be passed a NULL input or output buffer. At the
time being the driver ignores it and overwrites memory at 0.
Define a dummy buffer and use it when either input or output
buffer is NULL. Bail out when both are NULL as it shouldn't.
Also increase MAX_BUFFER len to 32k as the current is pretty
low.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Christophe Leroy [Tue, 2 Apr 2024 17:20:07 +0000 (19:20 +0200)]
spi: mpc8xx: Add GPIO dependency
Since commit
773ad4ebb1d6 ("spi, mpc8xx: Add support for chipselect via
GPIO and fixups"), DM_GPIO is required for 8xx SPI.
Add the missing dependency to avoid build failures.
Fixes: 773ad4ebb1d6 ("spi, mpc8xx: Add support for chipselect via GPIO and fixups")
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Hugo Dubois [Tue, 5 Dec 2023 16:10:44 +0000 (17:10 +0100)]
board: cssi: Properly initialise MAC address for fibre on CMPC885 board
CMPC885 board can be pluged on a mother board with fibre interface, so
fibre interface MAC address must be initialised for that case.
Signed-off-by: Hugo Dubois <hugo.dubois.ext@csgroup.eu>
Reviewed-by: CASAUBON Jean Michel <jean-michel.casaubon@csgroup.eu>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Hugo Dubois [Fri, 1 Dec 2023 14:56:12 +0000 (15:56 +0100)]
board: cssi: Initialise port F on MIAE
When equipped with the SRSA audio board, MIAE equipment
has an additional port called port F.
Initialise that port just like other ports of the board, so
that it is already configured when starting Linux kernel.
Signed-off-by: Hugo Dubois <hugo.dubois.ext@csgroup.eu>
Reviewed-by: CASAUBON Jean Michel <jean-michel.casaubon@csgroup.eu>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Jean-Michel CASAUBON [Tue, 31 Oct 2023 11:27:22 +0000 (11:27 +0000)]
board: cssi: Allow use without HUSH shell
HUSH shell is not always wanted/desirable.
Add missing braces in environment in order to allow use without
HUSH shell.
Signed-off-by: Jean-Michel CASAUBON <jean-michel.casaubon@csgroup.eu>
Cc: DUBOIS Hugo <hugo.dubois.ext@csgroup.eu>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Christophe Leroy [Fri, 12 Apr 2024 10:10:14 +0000 (12:10 +0200)]
board: cssi: Fix SPI nodes in DTS
When adding additional SPI peripherals, the reg property needs to
be added, and this leads to the following error:
arch/powerpc/dts/cmpc885.dtb: Warning (reg_format): /immr@
ff000000/spi@aa0/temp@1:reg: property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)
arch/powerpc/dts/cmpc885.dtb: Warning (reg_format): /immr@
ff000000/spi@aa0/temp@2:reg: property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)
Fix it by removing cell-index and cell-size which is unused and add
reg property. Also fix node name to be in line with reg value.
Also add missing compatible for eeprom node.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>