From c83a35f65250a8bdb519cb26680437e5c93d133d Mon Sep 17 00:00:00 2001
From: Novasys Ingenierie <xilinx@novasys-ingenierie.com>
Date: Wed, 27 Nov 2013 09:03:01 +0100
Subject: [PATCH] fpga: zynq: Correct fpga load when buf is not aligned
When ARCH_DMA_MINALIGN is greater than header size of the bit file, and buf is
not aligned, new_buf address became greater then buf_start address and the
load_word loop corrupts bit file data.
A work around is to decrease new_buf of ARCH_DMA_MINALIGN, it might corrupt data
before buf but permits to load correctly.
Signed-off-by: Stany MARCEL <smarcel@novasys-ingenierie.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/fpga/zynqpl.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index 1effbadda9..15900c9ef2 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -187,6 +187,16 @@ int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize)
if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) {
u32 *new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN);
+ /*
+ * This might be dangerous but permits to flash if
+ * ARCH_DMA_MINALIGN is greater than header size
+ */
+ if (new_buf > buf_start) {
+ debug("%s: Aligned buffer is after buffer start\n",
+ __func__);
+ new_buf -= ARCH_DMA_MINALIGN;
+ }
+
printf("%s: Align buffer at %x to %x(swap %d)\n", __func__,
(u32)buf_start, (u32)new_buf, swap);
--
2.39.5