From 6a251f24888b1ae3a1d20e21b5886e9cbd0e289b Mon Sep 17 00:00:00 2001
From: Harini Katakam <harini.katakam@amd.com>
Date: Mon, 10 Jul 2023 14:37:33 +0200
Subject: [PATCH] arm64: zynqmp: Assign TSU clock frequency for KV and KD
boards
Set TSU clock frequency as 250MHz (minimum when running at 1G) on
KV and KD carrier cards to allow PTP functionality.
Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4b758d503ef545e4d25d3930b0eb0793f1c415d2.1688992653.git.michal.simek@amd.com
---
arch/arm/dts/zynqmp-sck-kv-g-revA.dts | 1 +
arch/arm/dts/zynqmp-sck-kv-g-revB.dts | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
index 8229244d24..a81b3f6f51 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts
@@ -165,6 +165,7 @@
pinctrl-0 = <&pinctrl_gem3_default>;
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
+ assigned-clock-rates = <250000000>;
mdio: mdio {
#address-cells = <1>;
diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
index 96a51219f4..0ac20869b3 100644
--- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
+++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts
@@ -152,6 +152,7 @@
pinctrl-0 = <&pinctrl_gem3_default>;
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
+ assigned-clock-rates = <250000000>;
mdio: mdio {
#address-cells = <1>;
--
2.39.5