From: Felix Radensky <felix@embedded-sol.com> Date: Fri, 22 Jan 2010 23:35:24 +0000 (+0200) Subject: ppc4xx: Fix sending type 1 PCI transactions X-Git-Tag: v2025.01-rc5-pxa1908~20519 X-Git-Url: http://git.dujemihanovic.xyz/html/static/gitweb.css?a=commitdiff_plain;h=97c9f29008579f56c3fb86785f29f04dd4f47f94;p=u-boot.git ppc4xx: Fix sending type 1 PCI transactions The list of 4xx SoCs that should send type 1 PCI transactions is not defined correctly. As a result PCI-PCI bridges and devices behind them are not identified. The following 4xx variants should send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT. Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Stefan Roese <sr@denx.de> --- diff --git a/drivers/pci/pci_indirect.c b/drivers/pci/pci_indirect.c index ab51f8d01e..2070d0134b 100644 --- a/drivers/pci/pci_indirect.c +++ b/drivers/pci/pci_indirect.c @@ -59,7 +59,8 @@ indirect_##rw##_config_##size(struct pci_controller *hose, \ cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ return 0; \ } -#elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE) +#elif defined(CONFIG_440GX) || defined(CONFIG_440GP) || defined(CONFIG_440SP) || \ + defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT) #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ static int \ indirect_##rw##_config_##size(struct pci_controller *hose, \