arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433

The TS433 uses both pcie controllers for sata and the 2nd network
interface. Set the needed data-lanes in the pcie3 phy and enable
the second pcie controller, as well as remove the bifurcation comment.

Tested-by: Uwe Kleine-König <ukleinek@debian.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240723195538.1133436-3-heiko@sntech.de
[ upstream commit: 0f5f87a1d602a33028522784eb005647fa1b5c11 ]

(cherry picked from commit 7d8f260e65cc84076ec9456954de0f136948a2c8)

diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts
index 07b4f095d766ac09ab85c74a586d88782f314250..9bf9c3b65ca316d102ba1b544d8212e6fe37a2fc 100644 (file)
--- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts
+++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts
@@ -78,17 +78,25 @@
 };
 
 &pcie30phy {
+       data-lanes = <1 2>;
        status = "okay";
 };
 
 /* Connected to a JMicron AHCI SATA controller */
 &pcie3x1 {
-       /* The downstream dts has: rockchip,bifurcation, XXX: find out what this is about */
        reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
        vpcie3v3-supply = <&vcc3v3_pcie>;
        status = "okay";
 };
 
+/* Connected to the 2.5G NIC for the upper network jack */
+&pcie3x2 {
+       num-lanes = <1>;
+       reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
+       vpcie3v3-supply = <&vcc3v3_pcie>;
+       status = "okay";
+};
+
 &sdhci {
        bus-width = <8>;
        max-frequency = <200000000>;