]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: dts: ast2600: Add SGPIO to device tree
authorBilly Tsai <billy_tsai@aspeedtech.com>
Wed, 16 Oct 2024 08:59:55 +0000 (16:59 +0800)
committerTom Rini <trini@konsulko.com>
Tue, 29 Oct 2024 18:12:04 +0000 (12:12 -0600)
Add SGPIO DTS node and enable them for AST2600 EVB.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
arch/arm/dts/ast2600-evb.dts
arch/arm/dts/ast2600.dtsi
drivers/pinctrl/aspeed/pinctrl_ast2600.c

index 9aac0e26f280b8daecb1359e72a8072404023c26..570ba61965a0b42943c77d9183e5ca112bc5f11d 100644 (file)
        bootph-all;
        status = "okay";
 };
+
+&sgpiom0 {
+       status = "okay";
+       ngpios = <128>;
+};
+
+&sgpiom1 {
+       status = "okay";
+       ngpios = <80>;
+};
index 43db80edfe5cfd9aa466297f1801ffc203b1a783..cb8ce8b6b6ff07dd5ff94f7caf8ce862e468017f 100644 (file)
                                ngpios = <208>;
                        };
 
+                       sgpiom0: sgpiom@1e780500 {
+                               compatible = "aspeed,ast2600-sgpiom";
+                               reg = <0x1e780500 0x100>;
+                               interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&scu ASPEED_CLK_APB2>;
+                               #gpio-cells = <2>;
+                               gpio-controller;
+                               #interrupt-cells = <2>;
+                               interrupt-controller;
+                               bus-frequency = <1000000>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_sgpm1_default>;
+                               status = "disabled";
+                       };
+
+                       sgpiom1: sgpiom@1e780600 {
+                               compatible = "aspeed,ast2600-sgpiom";
+                               reg = <0x1e780600 0x100>;
+                               interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&scu ASPEED_CLK_APB2>;
+                               #gpio-cells = <2>;
+                               gpio-controller;
+                               #interrupt-cells = <2>;
+                               interrupt-controller;
+                               bus-frequency = <12000000>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_sgpm2_default>;
+                               status = "disabled";
+                       };
+
                        gpio1: gpio@1e780800 {
                                compatible = "aspeed,ast2600-gpio";
                                reg = <0x1e780800 0x800>;
                function = "PCIE1RC";
                groups = "PCIE1RC";
        };
+
+       pinctrl_sgpm1_default: sgpm1_default {
+               function = "SGPM1";
+               groups = "SGPM1";
+       };
+
+       pinctrl_sgpm2_default: sgpm2_default {
+               function = "SGPM2";
+               groups = "SGPM2";
+       };
 };
index bc12590e583604c96f643084072ddfac79824291..f4bec6fe53c6ce6ddadfd90a123ef08d01f5782a 100644 (file)
@@ -454,6 +454,14 @@ static struct aspeed_sig_desc pwm15g1[] = {
        {0x41c, BIT(31), 0},
 };
 
+static struct aspeed_sig_desc sgpm1[] = {
+       {0x414, GENMASK(27, 24), 0},
+};
+
+static struct aspeed_sig_desc sgpm2[] = {
+       {0x6d0, GENMASK(7, 4), 0},
+};
+
 static const struct aspeed_group_config ast2600_groups[] = {
        { "MAC1LINK", ARRAY_SIZE(mac1_link), mac1_link },
        { "MAC2LINK", ARRAY_SIZE(mac2_link), mac2_link },
@@ -543,6 +551,8 @@ static const struct aspeed_group_config ast2600_groups[] = {
        { "PWM14G1", ARRAY_SIZE(pwm14g1), pwm14g1 },
        { "PWM15G0", ARRAY_SIZE(pwm15g0), pwm15g0 },
        { "PWM15G1", ARRAY_SIZE(pwm15g1), pwm15g1 },
+       { "SGPM1", ARRAY_SIZE(sgpm1), sgpm1 },
+       { "SGPM2", ARRAY_SIZE(sgpm2), sgpm2 },
 };
 
 static int ast2600_pinctrl_get_groups_count(struct udevice *dev)