From ebdc27895492e740d96c67d624821cfeb56c7544 Mon Sep 17 00:00:00 2001
From: Alex Nemirovsky <Alex.Nemirovsky@cortina-access.com>
Date: Mon, 23 Dec 2019 20:19:20 +0000
Subject: [PATCH] MIPS: allow override of flush_dcache_range()
Useful in custom HW designs which have a need to flush dcache
range in a completely non standard way.
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
---
arch/mips/lib/cache.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index 502956d050..1a8c87d094 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -141,7 +141,7 @@ ops_done:
instruction_hazard_barrier();
}
-void flush_dcache_range(ulong start_addr, ulong stop)
+void __weak flush_dcache_range(ulong start_addr, ulong stop)
{
unsigned long lsize = dcache_line_size();
unsigned long slsize = scache_line_size();
--
2.39.5