From c6201553ba73616eed0f416f66d28c39691692bd Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@denx.de>
Date: Fri, 6 Apr 2012 03:25:06 +0000
Subject: [PATCH] ARM926EJS: Make asm routines volatile in cache ops
We certainly don't want the compiler to reorganise the code for dcache flushing.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Stefano Babic <sbabic@denx.de>
---
arch/arm/cpu/arm926ejs/cache.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
index 4430578a81..07f036f18b 100644
--- a/arch/arm/cpu/arm926ejs/cache.c
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -82,7 +82,7 @@ void flush_dcache_range(unsigned long start, unsigned long stop)
start += CONFIG_SYS_CACHELINE_SIZE;
}
- asm("mcr p15, 0, %0, c7, c10, 4\n"::"r"(0));
+ asm volatile("mcr p15, 0, %0, c7, c10, 4\n"::"r"(0));
}
void flush_cache(unsigned long start, unsigned long size)
--
2.39.5