From 7f50af6090507e79505846d80f76c8636903367c Mon Sep 17 00:00:00 2001
From: Peng Fan <peng.fan@nxp.com>
Date: Tue, 5 Mar 2019 02:32:28 +0000
Subject: [PATCH] imx8: add cpu support
Add cpu type and Kconfig entry
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm/include/asm/arch-imx/cpu.h | 1 +
arch/arm/mach-imx/imx8/Kconfig | 5 +++++
arch/arm/mach-imx/imx8/cpu.c | 3 +++
3 files changed, 9 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index 667badbc06..d4a83eef72 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -26,6 +26,7 @@
#define MXC_CPU_MX7D 0x72
#define MXC_CPU_IMX8MQ 0x82
#define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */
+#define MXC_CPU_IMX8QM 0x91 /* dummy ID */
#define MXC_CPU_IMX8QXP 0x92 /* dummy ID */
#define MXC_CPU_MX7ULP 0xE1 /* Temporally hard code */
#define MXC_CPU_VF610 0xF6 /* dummy ID */
diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig
index f76a139684..4336a8c236 100644
--- a/arch/arm/mach-imx/imx8/Kconfig
+++ b/arch/arm/mach-imx/imx8/Kconfig
@@ -10,6 +10,11 @@ config MU_BASE_SPL
SPL runs in EL3 mode, it use MU0_A to communicate with SCU.
So we could not reuse the one in dts which is for normal U-Boot.
+config IMX8QM
+ select IMX8
+ select SUPPORT_SPL
+ bool
+
config IMX8QXP
select IMX8
select SUPPORT_SPL
diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c
index 4bbc956f9d..2c425357b5 100644
--- a/arch/arm/mach-imx/imx8/cpu.c
+++ b/arch/arm/mach-imx/imx8/cpu.c
@@ -542,6 +542,8 @@ const char *get_imx8_type(u32 imxtype)
case MXC_CPU_IMX8QXP:
case MXC_CPU_IMX8QXP_A0:
return "QXP";
+ case MXC_CPU_IMX8QM:
+ return "QM";
default:
return "??";
}
@@ -613,6 +615,7 @@ static const struct cpu_ops cpu_imx8_ops = {
static const struct udevice_id cpu_imx8_ids[] = {
{ .compatible = "arm,cortex-a35" },
+ { .compatible = "arm,cortex-a53" },
{ }
};
--
2.39.5