From 724cdffca179057f4ebdf413ad764ea70b0e8ed2 Mon Sep 17 00:00:00 2001
From: Gabe Black <gabeblack@chromium.org>
Date: Fri, 30 Nov 2012 13:01:15 +0000
Subject: [PATCH] arm: Keep track of the tlb size as well as its location
It may be necessary to know where the TLB area ends as well as where it
starts. This allows board code to complete a secure memory erase without
destroying the page tables.
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/include/asm/global_data.h | 1 +
arch/arm/lib/board.c | 5 +++--
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index 2b9af93806..41a26edfb5 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -73,6 +73,7 @@ typedef struct global_data {
unsigned long reloc_off;
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
unsigned long tlb_addr;
+ unsigned long tlb_size;
#endif
const void *fdt_blob; /* Our device tree, NULL if none */
void **jt; /* jump table */
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 0459d0ce9f..c214bba881 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -348,13 +348,14 @@ void board_init_f(ulong bootflag)
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
/* reserve TLB table */
- addr -= (4096 * 4);
+ gd->tlb_size = 4096 * 4;
+ addr -= gd->tlb_size;
/* round down to next 64 kB limit */
addr &= ~(0x10000 - 1);
gd->tlb_addr = addr;
- debug("TLB table at: %08lx\n", addr);
+ debug("TLB table from %08lx to %08lx\n", addr, addr + gd->tlb_size);
#endif
/* round down to next 4 kB limit */
--
2.39.5