From 11d94319c32cc8590db2f1e186d19f32e652436c Mon Sep 17 00:00:00 2001 From: Peng Fan <peng.fan@nxp.com> Date: Tue, 8 Aug 2017 13:34:52 +0800 Subject: [PATCH] arm: Implement workaround for Cortex-A9 errata 845369 Under very rare timing circumstances, transitioning into streaming mode might create a data corruption. Present on Two or more processors or 1 core with ACP, all revisions. This erratum can be worked round by setting bit[22] of the undocumented Diagnostic Control Register to 1. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de> --- arch/arm/Kconfig | 3 +++ arch/arm/cpu/armv7/start.S | 6 ++++++ 2 files changed, 9 insertions(+) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7f6ab4ac7e..787f2b14a8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -97,6 +97,9 @@ config ARM_ERRATA_833069 config ARM_ERRATA_833471 bool +config ARM_ERRATA_845369 + bool + config ARM_ERRATA_852421 bool diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index f06fd28940..7b84a7a0f1 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -187,6 +187,12 @@ ENTRY(cpu_init_cp15) mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register #endif +#ifdef CONFIG_ARM_ERRATA_845369 + mrc p15, 0, r0, c15, c0, 1 @ read diagnostic register + orr r0, r0, #1 << 22 @ set bit #22 + mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register +#endif + mov r5, lr @ Store my Caller mrc p15, 0, r1, c0, c0, 0 @ r1 has Read Main ID Register (MIDR) mov r3, r1, lsr #20 @ get variant field -- 2.39.5