Maksim Kiselev [Sat, 11 Nov 2023 13:33:07 +0000 (16:33 +0300)]
sunxi: SPL SPI: Add SPI boot support for the Allwinner R528/T113 SoCs
R528/T113 SoCs uses the same SPI IP as the H6, also have the same clocks
and reset bits layout, but the CCU base is different. Another difference
is that the new SoCs do not have a clock divider inside. Instead of this
we should configure sample mode depending on input clock rate.
The pin assignment is also different: the H6 uses PC0, the R528/T113 PC4
instead. This makes for a change in spi0_pinmux_setup() routine.
This patch extends the H6/H616 #ifdef guards to also cover the R528/T113,
using the shared CONFIG_SUNXI_GEN_NCAT2 and CONFIG_MACH_SUN8I_R528
symbols. Also use CONFIG_SUNXI_GEN_NCAT2 symbol for the Kconfig
dependency.
Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com> Tested-by: Sam Edwards <CFSworks@gmail.com>
- Make i.MX93 boot less verbose.
- Remove unneedd environment variables from Toradex i.MX boards.
- Use gpio-hog on verdin-imx8mm/imx8mp.
- Add PCIe support for i.MX8MM.
- Add TPM support for imx8m*-venice.
The SMBIOS configuration table does not point to a paragraph-aligned
(16 byte aligned) address. The reason is that in write_tables() rom_addr is
not aligned and copied to gd->arch.smbios_start.
The Simple Firmware Interface requires that the SFI table is paragraph-
aligned but our code does not guarantee this.
As all tables written in write_tables() must be paragraph-aligned, we
should implement the address rounding in write_tables() and not in table
specific routines like copy_pirq_routing_table().
Add paragraph-alignment in write_tables().
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Since we support SetVariableRT now add the relevant tests
- Search for the RTStorageVolatile and VarToFile variables after EBS
- Try to update with invalid variales (BS, RT only)
- Try to write a variable bigger than our backend storage
- Write a variable that fits and check VarToFile has been updated
correclty
- Append to the variable and check VarToFile changes
- Try to delete VarToFile which is write protected
- Try to add/delete runtime variables
- Verify VarToFile contains a valid file format
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
efi_loader: add an EFI variable with the file contents
Previous patches enabled SetVariableRT using a RAM backend.
Although EBBR [0] defines a variable format we can teach userspace tools
and write the altered variables, it's better if we skip the ABI
requirements completely.
So let's add a new variable, in its own namespace called "VarToFile"
which contains a binary dump of the updated RT, BS and, NV variables
and will be updated when GetVariable is called.
Some adjustments are needed to do that.
Currently we discard BS-only variables in EBS(). We need to preserve
those on the RAM backend that exposes the variables. Since BS-only
variables can't appear at runtime we need to move the memory masking
checks from efi_var_collect() to efi_get_next_variable_name_mem()/
efi_get_variable_mem() and do the filtering at runtime.
We also need an efi_var_collect() variant available at runtime, in order
to construct the "VarToFile" buffer on the fly.
All users and applications (for linux) have to do when updating a variable
is dd that variable in the file described by "RTStorageVolatile".
Linux efivarfs uses a first 4 bytes of the output to represent attributes
in little-endian format. So, storing variables works like this:
Suggested-by: Ard Biesheuvel <ardb@kernel.org> # dumping all variables to a variable Co-developed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> # contributed on efi_var_collect_mem() Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
efi_loader: Add OS notifications for SetVariable at runtime
Previous patches enable SetVariable at runtime using a volatile storage
backend using EFI_RUNTIME_SERVICES_DATA allocared memory. Since there's
no recommendation from the spec on how to notify the OS, add a volatile
EFI variable that contains the filename relative to the ESP. OS'es
can use that file and update it at runtime
When we store EFI variables on file we don't allow SetVariable at runtime,
since the OS doesn't know how to access or write that file. At the same
time keeping the U-Boot drivers alive in runtime sections and performing
writes from the firmware is dangerous -- if at all possible.
For GetVariable at runtime we copy runtime variables in RAM and expose them
to the OS. Add a Kconfig option and provide SetVariable at runtime using
the same memory backend. The OS will be responsible for syncing the RAM
contents to the file, otherwise any changes made during runtime won't
persist reboots.
It's worth noting that the variable store format is defined in EBBR [0]
and authenticated variables are explicitly prohibited, since they have
to be stored on a medium that's tamper and rollback protected.
- pre-patch
$~ mount | grep efiva
efivarfs on /sys/firmware/efi/efivars type efivarfs (ro,nosuid,nodev,noexec,relatime)
$~ efibootmgr -n 0001
Could not set BootNext: Read-only file system
- post-patch
$~ mount | grep efiva
efivarfs on /sys/firmware/efi/efivars type efivarfs (rw,nosuid,nodev,noexec,relatime)
FWTS runtime results
Skipped tests are for SetVariable which is now supported
'Passed' test is for QueryVariableInfo which is not yet supported
Test: UEFI miscellaneous runtime service interface tests.
Test for UEFI miscellaneous runtime service interfaces 6 skipped
Stress test for UEFI miscellaneous runtime service i.. 1 skipped
Test GetNextHighMonotonicCount with invalid NULL par.. 1 skipped
Test UEFI miscellaneous runtime services unsupported.. 1 passed
Test: UEFI Runtime service variable interface tests.
Test UEFI RT service get variable interface. 1 passed
Test UEFI RT service get next variable name interface. 4 passed
Test UEFI RT service set variable interface. 8 passed
Test UEFI RT service query variable info interface. 1 skipped
Test UEFI RT service variable interface stress test. 2 passed
Test UEFI RT service set variable interface stress t.. 4 passed
Test UEFI RT service query variable info interface s.. 1 skipped
Test UEFI RT service get variable interface, invalid.. 5 passed
Test UEFI RT variable services unsupported status. 1 passed, 3 skipped
Masahisa Kojima [Mon, 4 Dec 2023 04:30:14 +0000 (13:30 +0900)]
efi_loader: use event callback for initrd deregistration
Currently efi_initrd_deregister() is called in bootefi.c
when the image started from bootefi command returns.
Since efi_guid_event_group_return_to_efibootmgr event is
implemented, so let's use this event for invoking
initrd deregistration.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
board: toradex: imx: Remove not needed env variables
Remove not needed variables from environment and include config files.
- setup variable used to be executed from some bootscript, however
it's not required and there is no point on having this small helper
here
- boot_file, kernel_file, ip_dyn variables are not used anywhere
- fdt_fixup variable is just set empty
- defargs, vidargs variables used to be used from some bootscript,
however there is no point on having it here and even old legacy
bootscript can work without them
- removed CONFIG_ENABLE_DDR_TRAINING_DEBUG, this is a leftover from
some copy/paste
On colibri imx6ull/imx7 NAND module, remove consoleblank=0, this is
already the Linux kernel default therefore useless.
Various Linux Kernel command line options removed are not-existing
left-over that applied to some old NXP i.MX downstream branch
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Tim Harvey [Wed, 17 Apr 2024 20:01:53 +0000 (13:01 -0700)]
board: gateworks: venice: fix dt adjustment for gw73xx baseboard for imx8mp
The GW73xx baseboard needs a PCI dt adjustment for revC/D based on a
change of the PCIe switch. Make sure we are only doing this for a pci
based ethernet to avoid causing a boot hang when the ethernet1 alias
points to eqos or fec. To know this is a pcie device ensure the alias
begins with the pcie controller.
arm: dts: verdin-imx8mm/imx8mp: use gpio-hog for sleep moci
In Linux, we allow sleep moci to be turned off when the carrier board
supports it and the system is in suspend. In U-Boot, however, we want
the sleep moci to be always on. So we use a gpio hog and disable the
regulator. This change is necessary because we switched to upstream
device tree files with commit 23fe2def1edf
("verdin-imx8mm/verdin-imx8mp: move imx verdins to OF_UPSTREAM"). A
recent upstream patch removes the gpio hog from the Linux device tree,
so we need to add it to the u-boot dtsi. The following patch will remove
the gpio hog from the Linux device tree:
https://lore.kernel.org/linux-devicetree/20240405160720.5977-1-eichest@gmail.com/
The U-Boot patch can be applied without it and will not break the build.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Tom Rini [Fri, 19 Apr 2024 13:28:43 +0000 (07:28 -0600)]
Merge tag 'u-boot-stm32-20240419' of https://source.denx.de/u-boot/custodians/u-boot-stm
MP1:
_ Add OHCI HCD support for STM32MP15xx DHSOM
_ Report OTP-CLOSED instead of rev.? on closed STM32MP15xx
_ Initialize TAMP_SMCR BKP..PROT fields on STM32MP15xx
_ Jump to ep on successful resume in PSCI suspend code
_ Add FASTBOOT support for STM32MP13
_ Fix/Rework key and leds management for STM32MP13/15
_ net: dwc_eth_qos: Clean up STM32 glue code and add STM32MP13xx support
MP2:
_ Add stm32-fmc-ebi support
_ Add: sdmmc2 support and fix AARCH64 compilation
ARM: dts: stm32: Update red led node for stm32mp157c-ed1-scmi-u-boot
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use led node's name instead for
u-boot,error-led property.
Rename red led node's name to led-red.
Remove status property which is useless.
Add compatible = "gpio-leds"; which is not present in kernel DT.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
ARM: dts: stm32: Don't probe red led at boot for stm32mp157c-ed1-scmi-u-boot
red led and button dedicated to fastboot share the same gpio GPIOA13.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from red led node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
ARM: dts: stm32: Update red led node for stm32mp157c-ed1-u-boot
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use led node's name instead for
u-boot,error-led property.
Rename red led node's name to led-red.
Remove status property which is useless.
Add compatible = "gpio-leds" which is not present in kernel DT.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
ARM: dts: stm32: Don't probe red led at boot for stm32mp157c-ed1-u-boot
red led and button dedicated to fastboot share the same gpio GPIOA13.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from red led node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
ARM: dts: stm32: Update u-boot, boot-led for stm32mp157a-dk1-u-boot
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use blue led node's name instead
for u-boot,boot-led property.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
ARM: dts: stm32: Update red led node for stm32mp157a-dk1-u-boot
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use red led node's name instead
for u-boot,error-led property.
Rename red led node's name to led-red.
Remove status property which is useless.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
ARM: dts: stm32: Don't probe red led at boot for stm32mp157a-dk1-u-boot
red led and button dedicated to fastboot share the same gpio GPIOA13.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from red led node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
ARM: dts: stm32: Add led-blue for stm32mp157a-dk1-scmi-u-boot
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use blue led node's name instead
for u-boot,boot-led property.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
ARM: dts: stm32: Update red led node for stm32mp157a-dk1-scmi-u-boot
As indicated in kernel led dt-bindings, label is a deprecated
property, so remove it and use red led node's name instead
for u-boot,error-led property.
Rename "red" led node's name to "led-red".
Remove status property which is useless.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
ARM: dts: stm32: Don't probe red led at boot for stm32mp157a-dk1-scmi-u-boot
red led and button dedicated to fastboot share the same gpio GPIOA13.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from red led node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
ARM: dts: stm32: Don't probe led-red/led-blue at boot for stm32mp135f-dk-u-boot
led-red and button dedicated to fastboot share the same gpio GPIOA13.
led-blue and button dedicated to stm32prog share the same gpio GPIOA14.
Led driver is probed early so the corresponding gpio is taken and
configured in output which forbid fastboot and stm32prog button usage.
To avoid this, remove the "default-state" property from led-red and
led-blue led's node.
This will avoid to trigger the led driver probe() to configure the led
default state during startup.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
ARM: dts: stm32: Add gpio-keys for stm32mp135f-dk-u-boot
Add 2 gpio-keys :
_ button-user-1 for stm32prog mode activation.
_ update button-user's label (defined in kernel DT) to match label
requested in board_key_check() for fastboot mode activation.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Fri, 19 Apr 2024 03:59:05 +0000 (05:59 +0200)]
ARM: stm32: Initialize TAMP_SMCR BKP..PROT fields on STM32MP15xx
In case of an OTP-CLOSED STM32MP15xx system, the CPU core 1 cannot be
released from endless loop in BootROM only by populating TAMP BKPxR 4
and 5 with magic and branch address and sending SGI0 interrupt from
core 0 to core 1 twice. TAMP_SMCR BKP..PROT fields must be initialized
as well to release the core 1 from endless loop during the second SGI0
handling on core 1. Initialize TAMP_SMCR to protect the first 32 backup
registers, the ones which contain the core 1 magic, branch address and
boot information.
This requirement seems to be undocumented, therefore it was necessary
to trace and analyze the STM32MP15xx BootROM using OpenOCD and objdump.
Ultimately, it turns out that a certain BootROM function reads out the
TAMP_SMCR register and tests whether the BKP..PROT fields are non-zero.
If they are zero, the BootROM code again waits for SGI0 using WFI, else
the execution moves forward until it reaches handoff to the TAMP BKPxR 5
branch address.
This fixes CPU core 1 release using U-Boot PSCI implementation on an
OTP-CLOSED system, i.e. system with fuse 0 bit 6 set.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Sun, 14 Apr 2024 18:39:29 +0000 (20:39 +0200)]
ARM: stm32: Report OTP-CLOSED instead of rev.? on closed STM32MP15xx
SoC revision is only accessible via DBUMCU IDC register,
which requires BSEC.DENABLE DBGSWENABLE bit to be set to
make the register accessible, otherwise an access to the
register triggers bus fault. As BSEC.DBGSWENABLE is zero
in case of an OTP-CLOSED system, do NOT set DBGSWENABLE
bit as this might open a brief window for timing attacks.
Instead, report that this system is OTP-CLOSED and do not
report any SoC revision to avoid confusing users. Use an
SEC/C abbreviation to avoid growing SOC_NAME_SIZE .
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Sun, 14 Apr 2024 18:38:31 +0000 (20:38 +0200)]
ARM: stm32: Drop superfluous Makefile entry for ecdsa_romapi.o
The source file is in arch/arm/mach-stm32mp/ecdsa_romapi.c and not
in arch/arm/mach-stm32mp/stm32mp1/ecdsa_romapi.c . There are two
Makefile entries in each subdirectory. Drop the bogus one and keep
only the correct one, the one in arch/arm/mach-stm32mp/Makefile .
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Sun, 7 Apr 2024 20:21:07 +0000 (22:21 +0200)]
ARM: stm32: Jump to ep on successful resume in PSCI suspend code
In case the system has resumed successfully, the PSCI suspend resume
code has to jump to the 'ep' successful resume entry point code path,
otherwise the code has to jump to content of the LR register, which
points to failed resume code path.
To implement this distinction, rewrite LR register stored on stack
with 'ep' value in case of a successful resume, which is really in
every case unless some catastrophic failure occurred during suspend.
Without this change, Linux counts every resume as failed in
/sys/power/suspend_stats/fail
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Tue, 26 Mar 2024 12:07:32 +0000 (13:07 +0100)]
net: dwc_eth_qos: Add support for st, ext-phyclk property
The "st,ext-phyclk" property is a unification of "st,eth-clk-sel"
and "st,eth-ref-clk-sel" properties. All three properties define
ETH CK clock direction, however:
- "st,eth-clk-sel" selects clock direction for GMII/RGMII mode
- "st,eth-ref-clk-sel" selects clock direction for RMII mode
- "st,ext-phyclk" selects clock direction for all RMII/GMII/RGMII modes
The "st,ext-phyclk" is the preferrable property to use.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Christophe ROULLIER <christophe.roullier@foss.st.com>
Marek Vasut [Tue, 26 Mar 2024 12:07:29 +0000 (13:07 +0100)]
net: dwc_eth_qos: Constify st, eth-* values parsed out of DT
Use const bool for the values parsed out of DT. Drop the duplicate
assignment of false into those bool variables, assign them directly
with the content parsed out of DT. Abbreviate the variable name too.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 26 Mar 2024 12:07:25 +0000 (13:07 +0100)]
net: dwc_eth_qos: Scrub ifdeffery
Replace ifdef CONFIG_CLK with if (CONFIG_IS_ENABLED(CLK)) to improve code
build coverage. Some of the functions printed debug("%s: OK\n", __func__);
on exit with and without CLK enabled, some did not, make it consistent and
print nothing if CLK is disabled.
Marek Vasut [Tue, 26 Mar 2024 12:07:24 +0000 (13:07 +0100)]
net: dwc_eth_qos: Fold board_interface_eth_init into STM32 glue code
Move board_interface_eth_init() into eqos_probe_syscfg_stm32() in STM32
driver glue code. The eqos_probe_syscfg_stm32() parses STM32 specific DT
properties of this MAC and configures SYSCFG registers accordingly, there
is nothing board specific happening in this function, move it into generic
driver code instead. Drop the now unused duplicates from board files.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 26 Mar 2024 12:07:23 +0000 (13:07 +0100)]
net: dwc_eth_qos: Rename eqos_stm32_config to eqos_stm32mp15_config
The current glue code is specific to STM32MP15xx, the upcoming STM32MP13xx
will introduce another entry specific to the STM32MP13xx. Rename the current
entry to eqos_stm32mp15_config in preparation for STM32MP13xx addition. No
functional change.
The FMC2 revision 2 supports security and isolation compliant with
the Resource Isolation Framework (RIF). From RIF point of view,
the FMC2 is composed of several independent resources, listed below,
which can be assigned to different security and compartment domains:
- 0: Common FMC_CFGR register.
- 1: EBI controller for Chip Select 1.
- 2: EBI controller for Chip Select 2.
- 3: EBI controller for Chip Select 3.
- 4: EBI controller for Chip Select 4.
- 5: NAND controller.
Add the support of the revision 2 of FMC2 IP.
- PCSCNTR register has been removed,
- CFGR register has been added,
- the bit used to enable the IP has moved from BCR1 to CFGR,
- the timeout for CEx deassertion has moved from PCSCNTR to BCRx,
- the continuous clock enable has moved from BCR1 to CFGR,
- the clk divide ratio has moved from BCR1 to CFGR.
The MP1 SoCs have only one signal to manage all the controllers (NWAIT).
The MP25 SOC has one RNB signal for the NAND controller and one NWAIT
signal for the memory controller.
Let's use a platform data structure for parameters that will differ
between MP1 and MP25.
Marek Vasut [Mon, 4 Mar 2024 18:25:43 +0000 (19:25 +0100)]
arm: stm32: Enable OHCI HCD support on STM32MP15xx DHSOM
The OHCI HCD is mandatory for USB 1.1 FS/LS device support, enable it.
This used to be enabled implicitly before, now that implicit dependency
disappeared and this got disabled. Enable it manually.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
stm32mp: cmd_stm32prog: add dependencies with USB_GADGET_DOWNLOAD
This patch avoids compilation issue when CONFIG_USB_GADGET is deactivated
in defconfig, with undefined reference to run_usb_dnl_gadget and to
g_dnl_set_product.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This prints the MMC device being read similar to how we print the MMC
device we write to when e.g. calling saveenv.
One of the side effects is that the boot log now shows from which MMC
device the env was loaded:
Loading Environment from MMC... Reading from MMC(1)... OK
This is useful to identify which MMC device the environment was loaded
from for boards where there are more than one (e.g. eMMC and SD card)
without adding some debug messages manually.
Sadly, there's no way to know which of the default or redundant
environment is being read from env_mmc_load before env_import_redund is
called so it is printing a bit later (and possibly after error/warning
messages).
Michal Simek [Mon, 15 Apr 2024 08:20:05 +0000 (10:20 +0200)]
Kconfig: Remove all default n options
default n doesn't need to be specified. It is default option anyway.
Similar changes have been done by commit 18370f14975c ("Kconfig: Remove all
default n/no options").
Marek Vasut [Sun, 14 Apr 2024 18:37:20 +0000 (20:37 +0200)]
boot: fdt: Turn all addresses and sizes into u64
In case of systems where DRAM bank ends at the edge of 32bit boundary,
start + size calculations would overflow. This happens on STM32MP15xx
with 1 DRAM bank starting at 0xc0000000 and 1 GiB of DRAM. This is a
usual 32bit system DRAM size overflow, fix it by doing all DRAM size
and offset calculations using u64 types. This also covers a case where
a 32bit PAE system might be able to address up to 36bits of DRAM.
Fixes: a4df06e41fa2 ("boot: fdt: Change type of env_get_bootm_low() to phys_addr_t") Signed-off-by: Marek Vasut <marex@denx.de>
This patch adds DEFLATE compression algorithm support. It's a good choice
to trade off between compression ratios and performance compared to LZ4.
Alternatively, DEFLATE could be used for some specific files since EROFS
supports multiple compression algorithms in one image.
Charles Hardin [Fri, 12 Apr 2024 20:45:33 +0000 (13:45 -0700)]
net: add support to parse the NIS domain for the dhcp options
There is code in the bootp parsing for NIS domain and add the
same support for the dhcp options as well. This allows the same
usage of the data when the dhcp command is used in the boot
command.
Signed-off-by: Charles Hardin <ckhardin@gmail.com>
input: button_kbd: gracefully handle buttons that fail probe
If a button device fails to probe, it will still be added to the uclass
device list, and therefore will still be iterated over in
button_read_keys() resulting in a UAF on the buttons private data.
Resolve this by unbinding button devices that aren't active after
probing, and print a warning so it's clear that the button is broken.
Tom Rini [Thu, 18 Apr 2024 18:13:40 +0000 (12:13 -0600)]
Merge tag 'tpm-master-18042024' of https://source.denx.de/u-boot/custodians/u-boot-tpm
Igor says:
"The problem initially was in the TEE sandbox driver implementation
(drivers/tee/sandbox.c) and it's limitations, which doesn't
permit to have multiple simultaneous sessions with different TAs.
This is what actually happened in this CI run [1], firstly "optee_rpmb"
cmd was executed (and after execution we had one session open), and
then "scp03", which also makes calls to OP-TEE, however it fails
in sandbox_tee_open_session() because of this check:
if (state->ta) {
printf("A session is already open\n");
return -EBUSY;
}
I had two ways in mind to address that:
1. Close a session on each optee_rpmb cmd invocation.
I don't see any reason to keep this session open, as obviously
there is no other mechanism (tbh, I don't know if DM calls ".remove" for active
devices) to close it automatically before handing over control to
Linux kernel. As a result we might end up with some orphaned sessions
registered in OP-TEE OS core (obvious resource leak).
2. Extend TEE sandbox driver, add support for multiple
simultaneous sessions just to handle the case.
I've chosen the first approach, as IMO it was "kill two birds with one stone",
I could address resource leak in OP-TEE and bypass limitations of
TEE sandbox driver."
Tom Rini [Thu, 18 Apr 2024 14:29:35 +0000 (08:29 -0600)]
Revert "Merge patch series "pxe: Allow extlinux booting without CMDLINE enabled""
As reported by Jonas Karlman this series breaks booting on some AArch64
platforms with common use cases. For now the best path forward is to
revert the series.
Unlike CMPC885 and CMPCPRO boards, the FPGA of MCR3000 board doesn't
load code automatically but needs to be loaded by software through SPI.
Until now it was loaded later by Linux, but we'd like U-boot to have
access to some information that require the FPGA, like board address
in racks.
So, implemented the load of FPGA in U-boot.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
---
To avoid spamming your email boxes, the code isn't included in
the emailed patch but will be present in the PULL request
Instead of cross using cross-directory makefile directives,
add a Makefile in board/cssi/common/ directory in order to
benefit from HAVE_VENDOR_COMMON_LIB logic.
spi: mpc8xx: Use 16 bit mode for large transfers with even size
On CPM, the RISC core is a lot more efficiant when doing transfers
in 16-bits chunks than in 8-bits chunks, but unfortunately the
words need to be byte swapped.
So, for large tranfers with an even size, allocate a temporary
buffer and byte-swap data before and after transfer.
This change allows setting higher speed for transfer. For instance
on an MPC 8xx (CPM1 comms RISC processor), the documentation tells
that transfer in byte mode at 1 kbit/s uses 0.200% of CPM load
at 25 MHz while a word transfer at the same speed uses 0.032%
of CPM load. This means the speed can be 6 times higher in
word mode for the same CPM load.
For small transfers, the load reduction is not worth the CPU load
required to allocate the temporary buffer, so do it only when data
size is over 64 bytes.
board: cssi: Add support for SPI bus on MCR3000 board
MCR3000 board has some components tied to the SPI bus, like the Texas
Instruments LM74 temperature sensor.
Add support for SPI bus. The SPI chipselects are a bit special in the
way that they are driven by 3 bits in a register of the board's CPLD
where the value writen in those bits exclusively activates one of the
7 possible chipselects and value 0 sets all chipselets to inactive.
So add a special GPIO driver that simulates GPIOs for those chipselect.
Hugo Dubois [Tue, 5 Dec 2023 16:10:44 +0000 (17:10 +0100)]
board: cssi: Properly initialise MAC address for fibre on CMPC885 board
CMPC885 board can be pluged on a mother board with fibre interface, so
fibre interface MAC address must be initialised for that case.
Signed-off-by: Hugo Dubois <hugo.dubois.ext@csgroup.eu> Reviewed-by: CASAUBON Jean Michel <jean-michel.casaubon@csgroup.eu> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Hugo Dubois [Fri, 1 Dec 2023 14:56:12 +0000 (15:56 +0100)]
board: cssi: Initialise port F on MIAE
When equipped with the SRSA audio board, MIAE equipment
has an additional port called port F.
Initialise that port just like other ports of the board, so
that it is already configured when starting Linux kernel.
Signed-off-by: Hugo Dubois <hugo.dubois.ext@csgroup.eu> Reviewed-by: CASAUBON Jean Michel <jean-michel.casaubon@csgroup.eu> Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
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