]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
19 months agoclk: rockchip: rk3588: add hardcoded assigned clocks values
Eugen Hristev [Thu, 13 Apr 2023 11:36:45 +0000 (14:36 +0300)]
clk: rockchip: rk3588: add hardcoded assigned clocks values

The CRU is being probed with a default set of assigned clocks, which
are not implemented in the driver at all.
Hence, when clk_set_defaults is called, it fails with ENOENT.
This would not be a problem, as the CRU still handles all the required
clocks, and the assigned clocks are default configs which are preprogrammed
or not required for Uboot operations.
However, the rockchip reset driver is being bound by the same DT node
as CRU, as the reset driver has no DT node.
But, when probing the reset node, it will call again the clk_set_defaults
for the CRU node, and failing because of missing those specific clocks
in the rk3588 clock driver.
To avoid this, simply implement a basic set/get that will just return
success and the default corresponding rate for the required assigned clocks.
As those clocks were not supported in Uboot, not required for Uboot
operations, there is no need to do any different kind of initialization.

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agorockchip: handle peripheral as well as otg dr_mode
John Keeping [Wed, 12 Apr 2023 11:52:53 +0000 (12:52 +0100)]
rockchip: handle peripheral as well as otg dr_mode

The OTG port is identified by inspecting the "dr_mode" property which is
expected to be "otg" for this port.  But it will work just as well as a
device controller when dr_mode is set to "peripheral", which may be
required if the mode detection pin is not set up correctly and the
device controller needs to be programmed to override this.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agorockchip: use standard dr_mode parsing function
John Keeping [Wed, 12 Apr 2023 11:52:52 +0000 (12:52 +0100)]
rockchip: use standard dr_mode parsing function

Instead of duplicating the string values here, use usb_get_dr_mode() to
handle the property lookup and converting the values to an enum.

This is implemented with a switch in preparation for the next patch
which adds extra handling for peripheral mode.

Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agoarm: dts: rockchip: rock-3a: drop u-boot,spl-boot-order
FUKAUMI Naoki [Thu, 20 Apr 2023 09:42:30 +0000 (09:42 +0000)]
arm: dts: rockchip: rock-3a: drop u-boot,spl-boot-order

use common one defined in rk356x-u-boot.dtsi.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agoarm: dts: rk356x: Makefile: sort
FUKAUMI Naoki [Sat, 8 Apr 2023 09:33:42 +0000 (09:33 +0000)]
arm: dts: rk356x: Makefile: sort

sort alphanumerically.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agodoc: rockchip: update list of Radxa ROCK (Pi) 4 boards
FUKAUMI Naoki [Wed, 26 Apr 2023 02:23:56 +0000 (02:23 +0000)]
doc: rockchip: update list of Radxa ROCK (Pi) 4 boards

add Radxa ROCK (Pi) 4 variants.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agoconfigs: rockchip: add Radxa ROCK 4C+
FUKAUMI Naoki [Wed, 26 Apr 2023 02:23:55 +0000 (02:23 +0000)]
configs: rockchip: add Radxa ROCK 4C+

add defconfig for Radxa ROCK 4C+.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agoarm: dts: rockchip: add Radxa ROCK 4C+
FUKAUMI Naoki [Wed, 26 Apr 2023 02:23:54 +0000 (02:23 +0000)]
arm: dts: rockchip: add Radxa ROCK 4C+

Linux commit 246450344dad arm64: dts: rockchip: rk3399: Radxa ROCK 4C+

Add support for Radxa ROCK 4C+ SBC.

Key differences of 4C+ compared to previous ROCK Pi 4.
- Rockchip RK3399-T SoC
- DP from 4C replaced with micro HDMI 2K@60fps
- 4-lane MIPI DSI with 1920*1080
- RK817 Audio codec

Also, an official naming convention from Radxa mention to remove
Pi from board name, so this 4C+ is named as Radxa ROCK 4C+ not
Radxa ROCK Pi 4C+.

Signed-off-by: Stephen Chen <stephen@radxa.com>
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agoconfigs: rockchip: rock-pi-4: use dtb for ROCK Pi 4A instead of 4B
FUKAUMI Naoki [Wed, 26 Apr 2023 02:23:53 +0000 (02:23 +0000)]
configs: rockchip: rock-pi-4: use dtb for ROCK Pi 4A instead of 4B

rk3399-rock-pi-4a.dtb is enough for Radxa ROCK Pi 4A/B/A+/B+ and ROCK 4SE.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agoarm: dts: rockchip: rock-pi-4: sync with Linux 6.3
FUKAUMI Naoki [Wed, 26 Apr 2023 02:23:52 +0000 (02:23 +0000)]
arm: dts: rockchip: rock-pi-4: sync with Linux 6.3

sync dts{,i} files for Radxa ROCK Pi 4 series with Linux 6.3.

because rk3399-rock-pi-4a.dts is enough for ROCK Pi 4A/B/A+/B+ and ROCK
4SE, delete dts{,i} for ROCK Pi 4B.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agorockchip: rk3328: Add support for FriendlyARM NanoPi R2C
Tianling Shen [Tue, 11 Apr 2023 10:14:49 +0000 (18:14 +0800)]
rockchip: rk3328: Add support for FriendlyARM NanoPi R2C

The NanoPi R2C is a minor variant of NanoPi R2S with the on-board NIC
chip changed from rtl8211e to yt8521s, and otherwise identical to R2S.

The device tree is taken from the kernel linux-next branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=004589ff9df5b75672a78b6c3c4cba93202b14c9

Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agoreset: reset-rockchip: fix trivial line spacing alignment
Eugen Hristev [Tue, 11 Apr 2023 07:20:40 +0000 (10:20 +0300)]
reset: reset-rockchip: fix trivial line spacing alignment

Fix line spacing aligment in bind function

Fixes: 760188c1aa5b ("rockchip: reset: support a (common) rockchip reset drivers")
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agoclk: rockchip: correct trivial typo in debug message
Eugen Hristev [Tue, 11 Apr 2023 07:17:56 +0000 (10:17 +0300)]
clk: rockchip: correct trivial typo in debug message

s/faile/failed in debug message

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agopci: pcie_dw_rockchip: release resources on failing probe
Eugen Hristev [Thu, 13 Apr 2023 14:11:03 +0000 (17:11 +0300)]
pci: pcie_dw_rockchip: release resources on failing probe

Implement a resource release mechanism on failing probe.
Without this, a strange situation can happen e.g. when init port fails,
or attempting to get the PHY fails, because the gpios have been
requested first, and if the user tries to do 'pci enum' again, the
driver will fail with 'can't find reset gpios' even if the gpios are
there, just because they were blocked by a previous probe attempt.
It is only natural to release the acquired resources if the probe fails,
just for consistency if nothing else.
This way on subsequent probe attempts, the user will get the same error
message, and not something different that doesn't make sense.

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agoboard: rockchip: add Anbernic RGXX3 Series Devices
Chris Morgan [Fri, 21 Apr 2023 15:59:19 +0000 (10:59 -0500)]
board: rockchip: add Anbernic RGXX3 Series Devices

The Anbernic RGxx3 is a "pseudo-device" that encompasses the following
devices:

 - Anbernic RG353M
 - Anbernic RG353P
 - Anbernic RG353V
 - Anbernic RG353VS
 - Anbernic RG503

The rk3566-anbernic-rgxx3.dtsi is synced with upstream Linux, but
rk3566-anbernic-rgxx3.dts is a U-Boot specific devicetree that
is used for all RGxx3 devices.

Via the board.c file, the bootloader automatically sets the correct
fdtfile, board, and board_name environment variables so that the
correct devicetree can be passed to Linux. It is also possible to
simply hard-code a single devicetree in the boot.scr file and use
that to load Linux as well.

The common specifications for each device are:

 - Rockchip RK3566 SoC
 - 2 external SDMMC slots
 - 1 USB-C host port, 1 USB-C peripheral port
 - 1 mini-HDMI output
 - MIPI-DSI based display panel
 - ADC controlled joysticks with a GPIO mux
 - GPIO buttons
 - A PWM controlled vibrator
 - An ADC controlled button

All of the common features are defined in the devicetree synced from
upstream Linux.

TODO: DSI panel auto-detection for the RG353 devices (requires porting
of DSI controller driver and DSI-DPHY driver to send DSI commands to
the panel).

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agork3399: r4s: Derive local MAC address if EEPROM is missing
Christian Kohlschütter [Tue, 27 Sep 2022 15:05:21 +0000 (15:05 +0000)]
rk3399: r4s: Derive local MAC address if EEPROM is missing

Some RK3399 boards, such as newer revisions of NanoPi R4S, do not
provide an EEPROM chip containing a globally unique MAC address.

Currently, this means that a randomly generated temporary MAC address
may be generated each time the device is rebooted, leading to ARP cache
issues and other confusing bugs.

Since RK3399 CPUs provide a built-in unique serial number, we can
reliably derive a locally MAC address from it by reading the
corresponding bits from the non-secure efuse block.

Enable configuration options that allow deriving a local MAC address
from the CPU serial number.

19 months agoinclude: fdtdec: decouple fdt_addr_t and phys_addr_t size
Johan Jonker [Mon, 13 Mar 2023 00:33:23 +0000 (01:33 +0100)]
include: fdtdec: decouple fdt_addr_t and phys_addr_t size

The DT specification supports CPUs with both 32-bit and 64-bit addressing
capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled
by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions
with a 64-bit reg property. These partitions synced from Linux end up with
the wrong offset and sizes when only the lower 32-bit is passed.
Decouple the fdt_addr_t and phys_addr_t size as they don't necessary
match.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agoarm: stm32mp: spl: fix function with fdt_addr_t input
Johan Jonker [Mon, 13 Mar 2023 00:33:09 +0000 (01:33 +0100)]
arm: stm32mp: spl: fix function with fdt_addr_t input

The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so fix ofnode_get_addr_size function with fdt_addr_t input to
be able to handle both sizes for stm32mp SoC in spl.c file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agodrivers: fix debug string with fdt_addr_t input
Johan Jonker [Mon, 13 Mar 2023 00:32:57 +0000 (01:32 +0100)]
drivers: fix debug string with fdt_addr_t input

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so fix some
debug strings with fdt_addr_t to be able to handle both sizes.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agodrivers: use devfdt_get_addr_ptr when cast to pointer
Johan Jonker [Mon, 13 Mar 2023 00:32:44 +0000 (01:32 +0100)]
drivers: use devfdt_get_addr_ptr when cast to pointer

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_ptr instead of the devfdt_get_addr function in
the various files in the drivers directory that cast to a pointer.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agodrivers: use devfdt_get_addr_index_ptr when cast to pointer
Johan Jonker [Mon, 13 Mar 2023 00:32:31 +0000 (01:32 +0100)]
drivers: use devfdt_get_addr_index_ptr when cast to pointer

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_index_ptr instead of the devfdt_get_addr_index function
in the various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agodrivers: use devfdt_get_addr_size_index_ptr when cast to pointer
Johan Jonker [Mon, 13 Mar 2023 00:32:18 +0000 (01:32 +0100)]
drivers: use devfdt_get_addr_size_index_ptr when cast to pointer

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_size_index_ptr instead of the devfdt_get_addr_size_index
function in the various files in the drivers directory that cast to
a pointer.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agodrivers: use dev_read_addr_ptr when cast to pointer
Johan Jonker [Mon, 13 Mar 2023 00:32:04 +0000 (01:32 +0100)]
drivers: use dev_read_addr_ptr when cast to pointer

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
dev_read_addr_ptr instead of the dev_read_addr function in the
various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agodrivers: use dev_read_addr_index_ptr when cast to pointer
Johan Jonker [Mon, 13 Mar 2023 00:31:49 +0000 (01:31 +0100)]
drivers: use dev_read_addr_index_ptr when cast to pointer

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
dev_read_addr_index_ptr instead of the dev_read_addr_index function
in the various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agospi: spi-aspeed-smc: use devfdt_get_addr_index_ptr
Johan Jonker [Mon, 13 Mar 2023 00:31:36 +0000 (01:31 +0100)]
spi: spi-aspeed-smc: use devfdt_get_addr_index_ptr

The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use devfdt_get_addr_index_ptr and devfdt_get_addr_size_index_ptr
function in the spi-aspeed-smc.c file. Also fix dev_dbg to be able
to handle both sizes. As we are there also streamline the error
response to -EINVAL on return.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
19 months agocore: read: add dev_read_addr_index_ptr function
Johan Jonker [Mon, 13 Mar 2023 00:31:25 +0000 (01:31 +0100)]
core: read: add dev_read_addr_index_ptr function

Add dev_read_addr_index_ptr function with the
same functionality as dev_read_addr_index,
but instead a return pointer is given.
Use map_sysmem() function as cast for the return.
Make same fix for dev_read_addr_ptr() function.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agocore: fdtaddr: add devfdt_get_addr_size_index_ptr function
Johan Jonker [Fri, 21 Apr 2023 15:33:58 +0000 (17:33 +0200)]
core: fdtaddr: add devfdt_get_addr_size_index_ptr function

Add devfdt_get_addr_size_index_ptr function with the same
functionality as devfdt_get_addr_size_index, but instead
a return pointer is given.

Suggested-by: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agorockchip: rk3288: syscon_rk3288: store syscon platdata in regmap
Johan Jonker [Mon, 13 Mar 2023 00:30:57 +0000 (01:30 +0100)]
rockchip: rk3288: syscon_rk3288: store syscon platdata in regmap

The Rockchip SoC rk3288 has 2 types of device trees floating around.
A 64bit reg size when synced from Linux and a 32bit for U-boot.
A pre-probe function in the syscon class driver assumes only 32bit.
For other odd reg structures the regmap must be defined in the individual
syscon driver. Store rk3288 platdata in a regmap before pre-probe
during bind.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
19 months agocore: remap: fix regmap_init_mem_plat() reg size handeling
Johan Jonker [Mon, 13 Mar 2023 00:30:46 +0000 (01:30 +0100)]
core: remap: fix regmap_init_mem_plat() reg size handeling

The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so convert regmap_init_mem_plat() input to handel both. The
syscon class driver also makes use of the regmap_init_mem_plat()
function, but has no way of knowing the format of the
device-specific platform data. In case of odd reg structures other
then that the syscon class driver assumes the regmap must be
filled in the individual syscon driver before pre-probe.
Also fix the ARRAY_SIZE divider in the syscon class driver.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoinclude: dm: ofnode: fix headers
Johan Jonker [Mon, 13 Mar 2023 00:30:33 +0000 (01:30 +0100)]
include: dm: ofnode: fix headers

When fdt_addr_t and phys_addr_t are split it turns out that
the header don't match the functions, so fix the headers.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agorockchip: spi: rk_spi: use base variable with uintptr_t size
Johan Jonker [Mon, 13 Mar 2023 00:30:20 +0000 (01:30 +0100)]
rockchip: spi: rk_spi: use base variable with uintptr_t size

The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use a base variable with uintptr_t size in the
rk_spi.c file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agorockchip: pwm: rk_pwm: use base variable with uintptr_t size
Johan Jonker [Mon, 13 Mar 2023 00:30:02 +0000 (01:30 +0100)]
rockchip: pwm: rk_pwm: use base variable with uintptr_t size

The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use a base variable with uintptr_t size in the
rk_pwm.c file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agorockchip: timer: dw-apb-timer: use regs variable with uintptr_t size
Johan Jonker [Mon, 13 Mar 2023 00:29:47 +0000 (01:29 +0100)]
rockchip: timer: dw-apb-timer: use regs variable with uintptr_t size

The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so use a regs variable with uintptr_t size in the
dw-apb-timer.c file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agorockchip: adc: rockchip-saradc: use dev_read_addr_ptr
Johan Jonker [Mon, 13 Mar 2023 00:29:35 +0000 (01:29 +0100)]
rockchip: adc: rockchip-saradc: use dev_read_addr_ptr

The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so use dev_read_addr_ptr in the rockchip-saradc.c file.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agomtd: nand: add support for the Sandisk SDTNQGAMA chip
Johan Jonker [Mon, 13 Mar 2023 00:29:19 +0000 (01:29 +0100)]
mtd: nand: add support for the Sandisk SDTNQGAMA chip

Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size,
1KB write size and 40 bit ecc support

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
19 months agomtd: nand: raw: rockchip_nfc: fix oobfree offset and description
Johan Jonker [Mon, 13 Mar 2023 00:29:05 +0000 (01:29 +0100)]
mtd: nand: raw: rockchip_nfc: fix oobfree offset and description

The MTD framework reserves 1 or 2 bytes for the bad block marker
depending on the bus size. The rockchip_nfc driver currently only
supports a 8 bit bus, but reserves standard 2 bytes for the BBM.
The first free OOB byte is therefore OOB2 at offset 2.
Page address(PA) bytes are moved to the last 4 positions before
ECC. Update the description for U-boot.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
19 months agomtd: nand: raw: rockchip_nfc: add flash_node to chip structure
Johan Jonker [Mon, 13 Mar 2023 00:28:53 +0000 (01:28 +0100)]
mtd: nand: raw: rockchip_nfc: add flash_node to chip structure

Add flash_node to the rockchip_nfc driver chip structure in order
to find the partitions in the add_mtd_partitions_of() function.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
19 months agomtd: nand: raw: rockchip_nfc: add layout structure
Johan Jonker [Mon, 13 Mar 2023 00:28:39 +0000 (01:28 +0100)]
mtd: nand: raw: rockchip_nfc: add layout structure

The MTD framework in U-boot is not identical for drivers ported
from Linux. The rockchip_nfc driver was ported with OOB ops functions
while the framework expects a layout structure per chip.
Fix by adding a structure with OOB data and remove unused functions.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
19 months agomtd: nand: raw: rockchip_nfc: remove the compatible string "rockchip,rk3308-nfc"
Johan Jonker [Mon, 13 Mar 2023 00:28:19 +0000 (01:28 +0100)]
mtd: nand: raw: rockchip_nfc: remove the compatible string "rockchip,rk3308-nfc"

The compatible string for rk3308 has as fallback string
"rockchip,rv1108-nfc". As there is no logic in probe priority between
the SoC orientated string and the fall back, so remove the compatible
string "rockchip,rk3308-nfc" from the driver.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
19 months agomtd: nand: raw: rockchip_nfc: use dev_read_addr_ptr
Johan Jonker [Mon, 13 Mar 2023 00:28:06 +0000 (01:28 +0100)]
mtd: nand: raw: rockchip_nfc: use dev_read_addr_ptr

The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so use dev_read_addr_ptr in the rockchip_nfc.c file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
19 months agoMerge tag 'video-for-v2023.07-rc2' of https://source.denx.de/u-boot/custodians/u...
Tom Rini [Fri, 5 May 2023 13:36:08 +0000 (09:36 -0400)]
Merge tag 'video-for-v2023.07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-video

 - enable video support in SPL
 - support splash screen for TI am62x
 - replace #ifdef and #if with if's in bmp/splash
 - add lm3533 backlight driver
 - add Solomon SSD2825 DSI/LVDS bridge driver
 - add Renesas R61307 and R69328 MIPI DSI panel drivers
 - add tegra DC based PWM backlight driver
 - add generic endeavoru (HTC One X) panel driver

19 months agoMerge tag 'fsl-qoirq-2023-5-5' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Fri, 5 May 2023 13:33:29 +0000 (09:33 -0400)]
Merge tag 'fsl-qoirq-2023-5-5' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq

fsl-ls1088a device tree update
enable DM_SERIAL for ten64
check for crypto node first in fdt_fixup_remove_jr

19 months agoarm: dts: ten64: fix header typo and update copyright
Mathew McBride [Wed, 12 Apr 2023 07:38:30 +0000 (07:38 +0000)]
arm: dts: ten64: fix header typo and update copyright

Somehow, I managed to typo our company name in the U-Boot
and Linux kernel submissions.

Fix this and update the copyright year at the same time.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: ten64: syncronise device tree with Linux
Mathew McBride [Wed, 12 Apr 2023 07:38:29 +0000 (07:38 +0000)]
arm: dts: ten64: syncronise device tree with Linux

This synchronises the Linux device tree with U-Boot
(cp linux/..../fsl-ls1088a-ten64.dts uboot/..../fsl-ls1088a-ten64.dts),
as of Linux v6.2-rc5.

Missing from the U-Boot copy previously was the
Ethernet PCS definitions (required for linking with PHY in
Linux but not used by U-Boot) and various upstream
fixes and formatting changes.

The board microcontroller (which doesn't have a Linux driver)
has been moved to the -u-boot.dtsi, as well as the
spi0 quadspi alias (used by U-boot 'sf' but not valid for Linux).

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: copy all missing bindings from Linux
Mathew McBride [Wed, 12 Apr 2023 07:38:28 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: copy all missing bindings from Linux

This is effectively:

cp linux/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi \
   u-boot/arch/arm/dts/fsl-ls1088a.dtsi

Tested working with Ten64 board (LS1088A) booting openSUSE Tumbleweed.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: move and sync existing bindings to be under /soc
Mathew McBride [Wed, 12 Apr 2023 07:38:27 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: move and sync existing bindings to be under /soc

Our [U-Boot] copy of fsl-ls1088a.dtsi had all the hardware under
the top level, until the DM_SERIAL implementation recently.

In this commit, remove any remaining devices (that were in U-Boot,
but not touched by previous patches in this series) to be under /soc,
updating to their upstream (Linux) bindings.

The bindings have been copied closest to their relative positions
in the Linux version, so the eventual result is that the U-Boot
and Linux fsl-ls1088a.dtsi will be identical.

The next commit will add the hardware bindings that were not
in U-Boot.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: syncronise fsl-mc definition with Linux
Mathew McBride [Wed, 12 Apr 2023 07:38:26 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: syncronise fsl-mc definition with Linux

This moves the fsl-mc device tree definition under the /soc
node, as well as adding interrupt and IOMMU definitions that
were not in U-Boot before.

There are slight differences between the two bindings
as we add a "simple-mfd" compatible to function
under U-Boot's driver model.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: syncronise MDIO+PCS U-Boot definitions with Linux
Mathew McBride [Wed, 12 Apr 2023 07:38:25 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: syncronise MDIO+PCS U-Boot definitions with Linux

Synchronise the MDIO controller definitions with Linux, so
the controllers will be usable when passing U-Boot's
control FDT to Linux.

This also adds the PCS (internal controller) definitions
which are not used by U-Boot.

Caveat: The kernel definition uses "fsl,fman-memac-mdio",
as with other members of the Layerscape family, but
U-Boot uses a different driver for the DPAA2
Family devices (LS1088/LS2088/LX2160). So
we use "fsl,ls-mdio" as the first compatible string
for these devices.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: sync usb controller nodes with Linux
Mathew McBride [Wed, 12 Apr 2023 07:38:24 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: sync usb controller nodes with Linux

Synchronise the USB device tree definition with Linux, allowing
the U-Boot control FDT to be used to boot a Linux system with
working USB.

An extra compatible string, "fsl,layerscape-dwc3" is needed
for special handling in U-Boot, so has been added to the
-u-boot.dtsi file. It might be better to add this to the
Linux source bindings.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: move I2C nodes under "soc" and syncronize with Linux
Mathew McBride [Wed, 12 Apr 2023 07:38:23 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: move I2C nodes under "soc" and syncronize with Linux

U-Boot's definition for the I2C controllers did not contain any
clock information. This resulted in the I2C not functioning when
the U-Boot control FDT was passed to Linux.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: move GPIO controller under "soc" per Linux
Mathew McBride [Wed, 12 Apr 2023 07:38:22 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: move GPIO controller under "soc" per Linux

Move the GPIO controller definitions under the "soc" and in
the same relative position as the Linux kernel fsl-ls1088a.dtsi.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: import CPU definition from Linux kernel
Mathew McBride [Wed, 12 Apr 2023 07:38:21 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: import CPU definition from Linux kernel

This is required for Linux to boot using the same FDT as
U-Boot (such as passing the control FDT to bootefi).

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: match Linux FDT by disabling PCIe by default
Mathew McBride [Wed, 12 Apr 2023 07:38:20 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: match Linux FDT by disabling PCIe by default

The Linux kernel fsl-ls1088a.dtsi disables (status="disabled")
all PCIe controllers by default, with the bootloader (i.e U-Boot)
enabling the appropriate controllers (specified by the board
reset control word/RCW) by FDT fixup.

However, U-Boot needs these controllers to be enabled
to be usable, which we can add in the u-boot only dtsi.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: sync PCIe controller definition with Linux
Mathew McBride [Wed, 12 Apr 2023 07:38:19 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: sync PCIe controller definition with Linux

This moves the PCIe controller definitions under /soc and adopts
the same bindings (fsl,ls1088a-pcie) as Linux. Previously,
the format was different between the two versions.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: import and sync full SMMU nodes with Linux
Mathew McBride [Wed, 12 Apr 2023 07:38:18 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: import and sync full SMMU nodes with Linux

To synchronise the device tree in U-Boot with Linux, the GIC
(Interrupt Controller) and SMMU/IOMMU nodes need to be synchronised
before changing any dependent components like PCIe and DPAA2/fsl-mc.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agopci: layerscape: add support for kernel/official fsl, ls1088a-pcie binding
Mathew McBride [Wed, 12 Apr 2023 07:38:17 +0000 (07:38 +0000)]
pci: layerscape: add support for kernel/official fsl, ls1088a-pcie binding

This allows the Layerscape PCIe RC driver to use the upstream
style binding (two "reg" entries instead of four).

It is similar to the previous commit e10da1f985ad
("pci: layerscape: add official ls1028a binding support")
which implemented this for the LS1028A.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: move memory node into U-Boot specific file
Mathew McBride [Wed, 12 Apr 2023 07:38:16 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: move memory node into U-Boot specific file

The top-level "memory" node does not exist in the Linux
version of the fsl-ls1088a.dtsi file. Move it to the U-Boot
"tweak" file, so we can have an identical copy of
fsl-ls1088a.dtsi between the projects in the end.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarm: dts: fsl-ls1088a: move u-boot bootph tags into u-boot only files
Mathew McBride [Wed, 12 Apr 2023 07:38:15 +0000 (07:38 +0000)]
arm: dts: fsl-ls1088a: move u-boot bootph tags into u-boot only files

This moves the bootph-all tags that were added in commit a593c1fec579
("arch: arm: dts: fsl-ls1088a.dtsi: tag serial nodes with bootph-all")
into a u-boot only include.

Due to the way the U-Boot device tree "tweak" system is setup[1],
we need to have a per-board <boardname>-u-boot.dtsi, which will
include the "fsl-ls1088a-u-boot.dtsi" tweaks.

By doing so, future updates to fsl-ls1088a.dtsi from upstream
(Linux kernel) can just be copied directly into the U-Boot tree,
without worrying about any extra data local to U-Boot.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
[1] - https://u-boot.readthedocs.io/en/latest/develop/devicetree/control.html#adding-tweaks-for-u-boot
The CONFIG_SYS_SOC, CONFIG_SYS_CPU and CONFIG_SYS_VENDOR
values are the same for the entire Layerscape family,
meaning there is no ability to create a LS1088A only
file here. But we will be adding per-board tweaks
later in any case.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoconfigs: ten64: enable DM_SERIAL
Mathew McBride [Wed, 12 Apr 2023 07:38:14 +0000 (07:38 +0000)]
configs: ten64: enable DM_SERIAL

The recent series "Convert LS1088A and LX2160 to DM_SERIAL"
from Ioana Ciornei provided the necessary support to enable
DM_SERIAL on the Ten64 board (LS1088A).

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoarmv8: fsl-layerscape: check for crypto node first in fdt_fixup_remove_jr
Mathew McBride [Wed, 12 Apr 2023 07:38:13 +0000 (07:38 +0000)]
armv8: fsl-layerscape: check for crypto node first in fdt_fixup_remove_jr

This a problem I found while updating the U-Boot fsl-ls1088a.dtsi
to match the Linux version.

fdt_fixup_remove_jr did not check whether there was a "crypto"
alias in the device tree before calling more fdt_* functions,
which resulted in a crash.

Fixes: a797f274
("ARMv8/sec_firmware : Update chosen/kaslr-seed with random number")

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
19 months agoMerge branch '2023-05-04-assorted-TI-updates'
Tom Rini [Fri, 5 May 2023 00:57:59 +0000 (20:57 -0400)]
Merge branch '2023-05-04-assorted-TI-updates'

- Clean up / merge some defconfigs, update DDR timings and a few more
  assorted fixes.

19 months agoarm: dts: k3-j7200: ddr: Update to 0.6 version of DDR config tool
Neha Malcom Francis [Tue, 25 Apr 2023 13:09:28 +0000 (18:39 +0530)]
arm: dts: k3-j7200: ddr: Update to 0.6 version of DDR config tool

Update the DDR settings to those generated using 0.6 version of
Jacinto 7 DDRSS Register Configuration tool.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
19 months agoarm: dts: k3-j721e: ddr: Update to 0.9.1 version of DDR config tool
Neha Malcom Francis [Tue, 25 Apr 2023 13:09:27 +0000 (18:39 +0530)]
arm: dts: k3-j721e: ddr: Update to 0.9.1 version of DDR config tool

Update the DDR settings to those generated using 0.9.1 version of
Jacinto 7 DDRSS Register Configuration tool.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
19 months agoconfigs: j7200: Merge the HS and non-HS defconfigs
Manorit Chawdhry [Thu, 4 May 2023 05:37:08 +0000 (11:07 +0530)]
configs: j7200: Merge the HS and non-HS defconfigs

K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.

Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.

Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
19 months agoKconfig: j721s2: Change K3_MCU_SCRATCHPAD_BASE to non firewalled region
Manorit Chawdhry [Thu, 4 May 2023 05:37:07 +0000 (11:07 +0530)]
Kconfig: j721s2: Change K3_MCU_SCRATCHPAD_BASE to non firewalled region

On K3 HS-SE devices all the firewalls are locked by default
until sysfw comes up. Rom configures some of the firewall for its usage
along with the SRAM for R5 but the PSRAM region is still locked.

The K3 MCU Scratchpad for j721s2 was set to a PSRAM region triggering the
firewall exception before sysfw came up. The exception started happening
after adding multi dtb support that accesses the scratchpad for reading
EEPROM contents.

Old map:
┌─────────────────────────────────────┐ 0x41c00000
│                 SPL                 │
├─────────────────────────────────────┤ 0x41c61f20 (approx)
│                STACK                │
├─────────────────────────────────────┤ 0x41c65f20
│             Global data             │
│  sizeof(struct global_data) = 0xd8  │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c66000
│                HEAP                 │
│  CONFIG_SYS_MALLOC_F_LEN = 0x10000  │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│               SPL BSS               │ (0x41c76000)
│  CONFIG_SPL_BSS_MAX_SIZE = 0xA000   │
├─────────────────────────────────────┤ (0x41c80000)
│               DM DATA               │
├─────────────────────────────────────┤ (0x41c84130) (approx)
│                EMPTY                │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
        (0x41cffbfc)

New map:
┌─────────────────────────────────────┐ 0x41c00000
│                 SPL                 │
├─────────────────────────────────────┤ 0x41c61f20 (approx)
│                STACK                │
├─────────────────────────────────────┤ 0x41c65f20
│             Global data             │
│  sizeof(struct global_data) = 0xd8  │
├─────────────────────────────────────┤ gd->malloc_base = 0x41c66000
│                HEAP                 │
│  CONFIG_SYS_MALLOC_F_LEN = 0x10000  │
├─────────────────────────────────────┤ CONFIG_SPL_BSS_START_ADDR
│               SPL BSS               │ (0x41c76000)
│  CONFIG_SPL_BSS_MAX_SIZE = 0xA000   │
├─────────────────────────────────────┤ (0x41c80000)
│               DM DATA               │
├─────────────────────────────────────┤ (0x41c84130) (approx)
│                EMPTY                │
├─────────────────────────────────────┤ SYS_K3_MCU_SCRATCHPAD_BASE
│              SCRATCHPAD             │ (0x41cff9fc)
│ SYS_K3_MCU_SCRATCHPAD_SIZE = 0x200  │
└─────────────────────────────────────┘ CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX
        (0x41cffbfc)

Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
19 months agoconfigs: j721s2: Merge the HS and non-HS defconfigs
Manorit Chawdhry [Thu, 4 May 2023 05:37:06 +0000 (11:07 +0530)]
configs: j721s2: Merge the HS and non-HS defconfigs

K3 devices have runtime type board detection. Make the default defconfig
include the secure configuration. Then remove the HS specific config.

Non-HS devices will continue to boot due to runtime device type detection.
If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
devices these can be ignored.

Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
19 months agoarm: dts: iot2050: Include u-boot specific bits implicitly
Jan Kiszka [Tue, 25 Apr 2023 19:28:23 +0000 (21:28 +0200)]
arm: dts: iot2050: Include u-boot specific bits implicitly

Create *-u-boot.dtsi files for each target dtb of the IOT2050 series so
that we can drop the #include deviations from upstream dts[i] files
here.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
19 months agoenvironment: ti: Add get_fit_config command to get FIT config string
Andrew Davis [Tue, 25 Apr 2023 16:20:45 +0000 (11:20 -0500)]
environment: ti: Add get_fit_config command to get FIT config string

When OE is packaging a dtb file into the FIT image it names the node based
on the dtb filename. Node names can't have "/" so it is turned into "_".
We select our FIT config using the "fdtfile" env var so we don't duplicate
the board_name to fdt logic. Result is fdtfile needs mangled when used to
select a config node from OE made FIT image. Do this here.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
19 months agoconfigs: am62x: enable secure device configs by default
Praneeth Bajjuri [Wed, 5 Apr 2023 22:40:47 +0000 (17:40 -0500)]
configs: am62x: enable secure device configs by default

Enable the CONFIG_TI_SECURE_DEVICE by default

Non-HS devices will continue to boot due to runtime device type detection.

TI's security enforcing SoCs will authenticate each binary it loads by
comparing it's signature with keys etched into the SoC during the boot
up process. The am62x family of SoCs by default will have some level of
security enforcement checking. To keep things as simple as possible,
enable the CONFIG_TI_SECURE_DEVICE options by default so all levels of
secure SoCs will work out of the box

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
19 months agok3: pmic: Clear ESM masks
Neha Malcom Francis [Wed, 5 Apr 2023 10:54:35 +0000 (16:24 +0530)]
k3: pmic: Clear ESM masks

ESM MCU masks must be set to 0h so that PMIC can handle errors
that require attention for example SYS_SAFETY_ERRn. The required bits
must be cleared: ESM_MCU_RST_MASK, ESM_MCU_FAIL_MASK, ESM_MCU_PIN_MASK.

If PMIC expected to handle errors, make sure EVM is configured to
connect SOC_SAFETY_ERRz (Main) to the PMIC.

Note that even though the User Guide for TPS65941 for J721E mentions
that these bits are reset to 0h; it is not reflected once board boots to
kernel, possibly due to NVM configurations. Eithercase, it is best to
account for this from R5 SPL side as well.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
19 months agoMerge branch '2023-05-03-assorted-updates-and-fixes'
Tom Rini [Thu, 4 May 2023 15:49:30 +0000 (11:49 -0400)]
Merge branch '2023-05-03-assorted-updates-and-fixes'

- Various typo fixes, pass -Werror to host tools builds, bdi cleanups,
  fix hush and local variables, a FSL PCI fix and correct some python in
  one of the tests.

19 months agoMerge tag 'efi-2023-07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Thu, 4 May 2023 13:03:02 +0000 (09:03 -0400)]
Merge tag 'efi-2023-07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2023-07-rc2

Documentation:

* treat documentation warnings as errors in CI
* adjust StarFive VisionFive 2 and SiFive Unmatched documentation
* man-page for cp
* correct description of uclass_get_device_by_of_path
* correct proftool usage

UEFI

* Fix documentation of EFI Python tests
* Rename efi_selftest Python test

19 months agoCI: treat documentation warnings as errors
Heinrich Schuchardt [Tue, 2 May 2023 03:04:11 +0000 (05:04 +0200)]
CI: treat documentation warnings as errors

We do not want to merge documentation that produces Sphinx warnings.

scripts/kernel-doc uses environment variable KDOC_WERROR to determine
if warnings should be treated as errors.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoefi: Rename the base efi self-test
Simon Glass [Wed, 19 Apr 2023 23:38:16 +0000 (11:38 +1200)]
efi: Rename the base efi self-test

This function uses the same base name as all the others in this file, so
it is not easy to run just that one test. Add a _base suffix so that it
can be run on its own.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
19 months agodoc: man-page for cp
Heinrich Schuchardt [Fri, 28 Apr 2023 06:52:41 +0000 (08:52 +0200)]
doc: man-page for cp

Add a man-page for the cp command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agotest: fix pydoc issues for EFI tests
Heinrich Schuchardt [Wed, 3 May 2023 05:08:05 +0000 (07:08 +0200)]
test: fix pydoc issues for EFI tests

Fix issues reported by pydocstyle.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
19 months agodoc: correct HiFive Unmatched boot description
Heinrich Schuchardt [Mon, 1 May 2023 12:47:52 +0000 (14:47 +0200)]
doc: correct HiFive Unmatched boot description

Main U-Boot is loaded by sector number, not by partition GUID type.

Fixes: 70415e1e528d ("board: sifive: add HiFive Unmatched board support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
19 months agodoc: fix StarFive VisionFive v2 documentation
Heinrich Schuchardt [Mon, 1 May 2023 12:20:48 +0000 (14:20 +0200)]
doc: fix StarFive VisionFive v2 documentation

The number of the partition that U-Boot SPL loads the main U-Boot from is
defined as 2 by CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2. The
partition type GUID is not used currently.

Reword the description of the boot process to make it clearer.

Fixes: 5ecf9b0b8a75 ("board: starfive: add StarFive VisionFive v2 board support")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
19 months agodoc: Indicate required OpenSBI release for VisionFive 2
Heinrich Schuchardt [Thu, 27 Apr 2023 09:56:58 +0000 (11:56 +0200)]
doc: Indicate required OpenSBI release for VisionFive 2

Support for the VisionFive 2 board is not contained in the most recent
OpenSBI release (v1.2).

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
19 months agodocs: fix wrong proftool usage
Pavel Skripkin [Wed, 12 Apr 2023 19:05:31 +0000 (22:05 +0300)]
docs: fix wrong proftool usage

Guide shows incorrect usage of proftool, which is confusing. If proftool
is used w/o '-o' argument it complains like following

$ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-ftrace > trace.dat
Must provide trace data, System.map file and output file
Usage: proftool [-cmtv] <cmd> <profdata>

s/>/-o/ fixes it and proftool outputs decoded data to trace.dat

Signed-off-by: Pavel Skripkin <paskripkin@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agodoc: mmc: drop 0x prefixes in read/write examples
Alexander Shirokov [Thu, 27 Apr 2023 10:12:07 +0000 (12:12 +0200)]
doc: mmc: drop 0x prefixes in read/write examples

The patch drops 0x prefixes because all numbers are interpreted as HEX
by default.

Also, it fixes the mismatch between input arguments and output at 'mmc
write' example. Now it's 256 (0x100) blocks.

Signed-off-by: Alexander Shirokov <shirokovalexs@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
19 months agodm: core: fix introduce uclass_get_device_by_of_path
Heinrich Schuchardt [Tue, 2 May 2023 02:59:18 +0000 (04:59 +0200)]
dm: core: fix introduce uclass_get_device_by_of_path

Correct the function documentation.

Fixes: ca031c082700 ("dm: core: introduce uclass_get_device_by_of_path()")
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agotools: fix TestFdtUtil()
Heinrich Schuchardt [Thu, 20 Apr 2023 18:03:43 +0000 (20:03 +0200)]
tools: fix TestFdtUtil()

Variable old_outdir cannot be used before assignment.
The assignment must occur before the try block.

tools/dtoc/test_fdt.py:796:26:
E0601: Using variable 'old_outdir' before assignment
(used-before-assignment)

Add missing space in assignment.

Fixes: a004f29464d1 ("binman: Tidy up _SetupDtb() to use its own temporary file")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agopci: fsl: Do not access PCI BAR0 register of PCIe Root Port
Pali Rohár [Tue, 2 May 2023 17:53:57 +0000 (19:53 +0200)]
pci: fsl: Do not access PCI BAR0 register of PCIe Root Port

Freescale PCIe Root Port has PEXCSRBAR register at position of PCI BAR0.
PCIe Root Port does not have any PCIe memory, so returns zero when trying
to read from PCIe Root Port BAR0 and ignore any writes.

Signed-off-by: Pali Rohár <pali@kernel.org>
19 months agobuildman: Pass -Werror to the host compiler too
Simon Glass [Fri, 28 Apr 2023 19:50:48 +0000 (13:50 -0600)]
buildman: Pass -Werror to the host compiler too

The host compiler is not failing on warnings at present, when the
-E flag is used in buildman. Add the required flag to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com>
19 months agocommon/Kconfig: fix comments syntax error
Hugo Villeneuve [Tue, 25 Apr 2023 18:34:45 +0000 (14:34 -0400)]
common/Kconfig: fix comments syntax error

Fix comments error in EVENT_DEBUG description:
    this get usefui -> this to get useful

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoevent: fix comments syntax error
Hugo Villeneuve [Tue, 25 Apr 2023 13:46:45 +0000 (09:46 -0400)]
event: fix comments syntax error

Fix comments syntax error in event description:
    creasted -> created

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agoboot/Kconfig: fix comments syntax error
Hugo Villeneuve [Mon, 24 Apr 2023 20:51:12 +0000 (16:51 -0400)]
boot/Kconfig: fix comments syntax error

Fix comments syntax error in SPL_LOAD_FIT_APPLY_OVERLAY description.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agocmd: bdinfo: Print ethaddr of current MAC
Marek Vasut [Sat, 22 Apr 2023 13:01:33 +0000 (15:01 +0200)]
cmd: bdinfo: Print ethaddr of current MAC

Instead of always printing ethaddr of MAC 0, print eth%daddr of the current MAC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agocmd: bdinfo: Wrap network information printing into print_eth()
Marek Vasut [Sat, 22 Apr 2023 13:01:32 +0000 (15:01 +0200)]
cmd: bdinfo: Wrap network information printing into print_eth()

Move all the network information printing into print_eth(),
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agocmd: bdinfo: Map fdt_blob and new_fdt to sysmem
Marek Vasut [Sat, 22 Apr 2023 13:01:31 +0000 (15:01 +0200)]
cmd: bdinfo: Map fdt_blob and new_fdt to sysmem

Map fdt_blob and new_fdt to sysmem, otherwise $fdtcontroladdr
and bdinfo output do not match and the bdinfo output address
is not a valid address accessible via sandbox memory accessors.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agotools: fix TestFdtUtil()
Heinrich Schuchardt [Thu, 20 Apr 2023 18:03:43 +0000 (20:03 +0200)]
tools: fix TestFdtUtil()

Variable old_outdir cannot be used before assignment.
The assignment must occur before the try block.

tools/dtoc/test_fdt.py:796:26:
E0601: Using variable 'old_outdir' before assignment
(used-before-assignment)

Add missing space in assignment.

Fixes: a004f29464d1 ("binman: Tidy up _SetupDtb() to use its own temporary file")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agotest: hush_if_test: Add hush variable test
Stefan Herbrechtsmeier [Mon, 3 Apr 2023 13:50:01 +0000 (15:50 +0200)]
test: hush_if_test: Add hush variable test

Add a test for the hush shell variable assignment and clear.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agocommon: cli_hush: Restore clear local variable support
Stefan Herbrechtsmeier [Mon, 3 Apr 2023 13:50:00 +0000 (15:50 +0200)]
common: cli_hush: Restore clear local variable support

The u-boot hush shell doesn’t support the unset command to clear a
variable and therefore an empty value ("c=") should be a valid value
for the set_local_var function to clear the variable. This partial
reverts commit aa722529635c ("common: cli_hush: avoid dead code") and
only checks for a `=` in the string. Additionally explicit call the
unset_local_var function to remove the variable if the value is empty.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agobk4r1: Enable LTO
Tom Rini [Wed, 3 May 2023 22:29:58 +0000 (18:29 -0400)]
bk4r1: Enable LTO

In order to allow for general platform growth due to fixes, enable LTO
here to give us more room.

Signed-off-by: Tom Rini <trini@konsulko.com>
19 months agoMerge tag 'u-boot-imx-20230503' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Wed, 3 May 2023 17:15:12 +0000 (13:15 -0400)]
Merge tag 'u-boot-imx-20230503' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20230503
-------------------

- Fixes for : pico-imx6ul, smegw01
- new boards: DMSSE20, Reform 2
- fix: get_boot_device, PLL video rate

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16211

19 months agoMerge branch '2023-05-02-assorted-platform-updates-and-additions'
Tom Rini [Wed, 3 May 2023 13:23:21 +0000 (09:23 -0400)]
Merge branch '2023-05-02-assorted-platform-updates-and-additions'

- Updates for starqltechn and other qualcomm platforms, hi3798mv200,
  Broadcom Northstar, and mediatek platforms
- Drop omap5_uevm, and assorted TI platform updates
- Add MAX14526

19 months agostarqltechn: enable bootmenu
Dzmitry Sankouski [Sat, 1 Apr 2023 09:28:44 +0000 (12:28 +0300)]
starqltechn: enable bootmenu

Needed for multiboot with vendor's Android.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
19 months agostarqltechn: use button keyboard driver
Dzmitry Sankouski [Sat, 1 Apr 2023 09:28:43 +0000 (12:28 +0300)]
starqltechn: use button keyboard driver

Button keyboard driver used to navigate bootmenu entries.

Add gpio buttons, button keyboard driver.
Add gpio keys dts bindings.

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
19 months agostarqltechn: use 16x32 font
Dzmitry Sankouski [Sat, 1 Apr 2023 09:28:42 +0000 (12:28 +0300)]
starqltechn: use 16x32 font

This font is more readable on high ppi display

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>