]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
Convert CONFIG_TEGRA_ENABLE_UARTA et al to Kconfig
authorTom Rini <trini@konsulko.com>
Fri, 2 Dec 2022 21:42:45 +0000 (16:42 -0500)
committerTom Rini <trini@konsulko.com>
Thu, 22 Dec 2022 15:31:48 +0000 (10:31 -0500)
This converts the following to Kconfig:
   CONFIG_TEGRA_ENABLE_UARTA
   CONFIG_TEGRA_ENABLE_UARTB
   CONFIG_TEGRA_ENABLE_UARTC
   CONFIG_TEGRA_ENABLE_UARTD
   CONFIG_TEGRA_SPI
   CONFIG_TEGRA_UARTA_GPU
   CONFIG_TEGRA_UARTA_SDIO1
   CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
   CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1

Signed-off-by: Tom Rini <trini@konsulko.com>
38 files changed:
arch/arm/mach-tegra/Kconfig
arch/arm/mach-tegra/tegra20/Kconfig
arch/arm/mach-tegra/tegra30/Kconfig
configs/cei-tk1-som_defconfig
configs/dalmore_defconfig
configs/harmony_defconfig
configs/jetson-tk1_defconfig
configs/medcom-wide_defconfig
configs/plutux_defconfig
configs/seaboard_defconfig
configs/tec-ng_defconfig
configs/tec_defconfig
configs/ventana_defconfig
include/configs/apalis-tk1.h
include/configs/apalis_t30.h
include/configs/beaver.h
include/configs/cardhu.h
include/configs/cei-tk1-som.h
include/configs/colibri_t20.h
include/configs/colibri_t30.h
include/configs/dalmore.h
include/configs/harmony.h
include/configs/jetson-tk1.h
include/configs/medcom-wide.h
include/configs/nyan-big.h
include/configs/p2371-0000.h
include/configs/p2371-2180.h
include/configs/p2571.h
include/configs/p3450-0000.h
include/configs/paz00.h
include/configs/plutux.h
include/configs/seaboard.h
include/configs/tec-ng.h
include/configs/tec.h
include/configs/tegra-common-post.h
include/configs/trimslice.h
include/configs/venice2.h
include/configs/ventana.h

index edcf967afd96ae8bf94ce886439827c30ace7f64..1b575cc0f456530068142c1d7434f357cdd635f5 100644 (file)
@@ -177,6 +177,29 @@ source "arch/arm/mach-tegra/tegra124/Kconfig"
 source "arch/arm/mach-tegra/tegra210/Kconfig"
 source "arch/arm/mach-tegra/tegra186/Kconfig"
 
+config TEGRA_SPI
+       def_bool y
+       depends on TEGRA20_SFLASH || TEGRA20_SLINK || TEGRA114_SPI
+
+choice
+       prompt "UART to use for console"
+       depends on TEGRA_PINCTRL
+       default TEGRA_ENABLE_UARTA
+
+config TEGRA_ENABLE_UARTA
+       bool "Use UARTA"
+
+config TEGRA_ENABLE_UARTB
+       bool "Use UARTB"
+
+config TEGRA_ENABLE_UARTC
+       bool "Use UARTC"
+
+config TEGRA_ENABLE_UARTD
+       bool "Use UARTD"
+
+endchoice
+
 config TEGRA_GPU
        bool "Enable setting up the GPU"
        depends on TEGRA124 || TEGRA210
index 345563fc789e678ea5c42774638c42950c5240cd..955786c0c4841a4e1ea5c6a32c714bd0ecbd083f 100644 (file)
@@ -10,6 +10,12 @@ config TEGRA_PMU
 config TEGRA_CLOCK_SCALING
        bool
 
+config TEGRA_UARTA_GPU
+       bool
+
+config TEGRA_UARTA_SDIO1
+       bool
+
 choice
        prompt "Tegra20 board select"
        optional
@@ -43,6 +49,7 @@ config TARGET_TEC
 config TARGET_TRIMSLICE
        bool "Compulab TrimSlice board"
        select BOARD_LATE_INIT
+       select TEGRA_UARTA_GPU
 
 config TARGET_VENTANA
        bool "NVIDIA Tegra20 Ventana evaluation board"
@@ -51,6 +58,7 @@ config TARGET_VENTANA
 config TARGET_COLIBRI_T20
        bool "Toradex Colibri T20 board"
        select BOARD_LATE_INIT
+       select TEGRA_UARTA_SDIO1
 
 endchoice
 
index 85b8ce294f275ef83b3254398200204fa2e17b47..5619d1cd42f73fe2e78bcaefac362b88e147abcd 100644 (file)
@@ -1,5 +1,11 @@
 if TEGRA30
 
+config TEGRA_VDD_CORE_TPS62361B_SET3
+       bool
+
+config TEGRA_VDD_CORE_TPS62366A_SET1
+       bool
+
 choice
        prompt "Tegra30 board select"
        optional
@@ -11,10 +17,12 @@ config TARGET_APALIS_T30
 config TARGET_BEAVER
        bool "NVIDIA Tegra30 Beaver evaluation board"
        select BOARD_LATE_INIT
+       select TEGRA_VDD_CORE_TPS62366A_SET1
 
 config TARGET_CARDHU
        bool "NVIDIA Tegra30 Cardhu evaluation board"
        select BOARD_LATE_INIT
+       select TEGRA_VDD_CORE_TPS62361B_SET3
 
 config TARGET_COLIBRI_T30
        bool "Toradex Colibri T30 board"
index 58d75a52a08d53488b5de85a26cefce34b0f1121..0c4627aff0544be202cb0d86495882f0642ef614 100644 (file)
@@ -12,6 +12,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000
 CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # "
 CONFIG_TEGRA124=y
 CONFIG_TARGET_CEI_TK1_SOM=y
+CONFIG_TEGRA_ENABLE_UARTD=y
 CONFIG_TEGRA_GPU=y
 CONFIG_ARMV7_PSCI_0_1=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
index cc46f4eda419ebaa3ce08f9411531fa6b7f86340..5d29dae3411a479344af403e303cdc91ab285367 100644 (file)
@@ -11,6 +11,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000
 CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # "
 CONFIG_TEGRA114=y
 CONFIG_TARGET_DALMORE=y
+CONFIG_TEGRA_ENABLE_UARTD=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_CONSOLE_MUX=y
index 353d1a33fabe6995ad2756679cedc093ca190a24..c8694bba6819a70098ab99b10c4507122271a33f 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000
 CONFIG_SYS_PROMPT="Tegra20 (Harmony) # "
 CONFIG_TEGRA20=y
 CONFIG_TARGET_HARMONY=y
+CONFIG_TEGRA_ENABLE_UARTD=y
 CONFIG_SYS_LOAD_ADDR=0x1000000
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_SYS_STDIO_DEREGISTER=y
index b391a86c0225818fdb5bf9b52b5c5103a1dc8f9d..d935e784ab424601bb2eb94b68da76bc06d77160 100644 (file)
@@ -12,6 +12,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000
 CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # "
 CONFIG_TEGRA124=y
 CONFIG_TARGET_JETSON_TK1=y
+CONFIG_TEGRA_ENABLE_UARTD=y
 CONFIG_TEGRA_GPU=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_OF_SYSTEM_SETUP=y
index 76e4eb3078c8c08bae47f551fe19363a788b447c..563e01459af6350b9272332644d051ab82508692 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000
 CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # "
 CONFIG_TEGRA20=y
 CONFIG_TARGET_MEDCOM_WIDE=y
+CONFIG_TEGRA_ENABLE_UARTD=y
 CONFIG_SYS_LOAD_ADDR=0x1000000
 CONFIG_FIT=y
 CONFIG_OF_SYSTEM_SETUP=y
index 170ac86468d793f3b09135294b23668331d04fc3..789b5d939822ac8fe465ba69f0643feec16e9fb4 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000
 CONFIG_SYS_PROMPT="Tegra20 (Plutux) # "
 CONFIG_TEGRA20=y
 CONFIG_TARGET_PLUTUX=y
+CONFIG_TEGRA_ENABLE_UARTD=y
 CONFIG_SYS_LOAD_ADDR=0x1000000
 CONFIG_FIT=y
 CONFIG_OF_SYSTEM_SETUP=y
index 2375040a9ec55bfbb9c399ce3ac6bbee3bad17ee..dc9225188fa2fdfe84b83a9b8c1ebdf9c8186849 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000
 CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # "
 CONFIG_TEGRA20=y
 CONFIG_TARGET_SEABOARD=y
+CONFIG_TEGRA_ENABLE_UARTD=y
 CONFIG_SYS_LOAD_ADDR=0x1000000
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_USE_PREBOOT=y
index 02d6b496f9675f26448984811e79526af9899ab1..8c3f8d5e06577c74615f10a755fc784be958addc 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x80108000
 CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # "
 CONFIG_TEGRA30=y
 CONFIG_TARGET_TEC_NG=y
+CONFIG_TEGRA_ENABLE_UARTD=y
 CONFIG_SYS_LOAD_ADDR=0x81000000
 CONFIG_FIT=y
 CONFIG_OF_SYSTEM_SETUP=y
index 967d3050eff62887a5cc28f167cd81dcd5a6cd5d..a1900f0181d54caa8cae59d8fc540621830a08cf 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000
 CONFIG_SYS_PROMPT="Tegra20 (TEC) # "
 CONFIG_TEGRA20=y
 CONFIG_TARGET_TEC=y
+CONFIG_TEGRA_ENABLE_UARTD=y
 CONFIG_SYS_LOAD_ADDR=0x1000000
 CONFIG_FIT=y
 CONFIG_OF_SYSTEM_SETUP=y
index 3c924ec9eae330ee748a1a2bb53de5b257d1c6f5..3d94f454be23b4c53e03f8804e5034e7dccaa77a 100644 (file)
@@ -10,6 +10,7 @@ CONFIG_SPL_TEXT_BASE=0x00108000
 CONFIG_SYS_PROMPT="Tegra20 (Ventana) # "
 CONFIG_TEGRA20=y
 CONFIG_TARGET_VENTANA=y
+CONFIG_TEGRA_ENABLE_UARTD=y
 CONFIG_SYS_LOAD_ADDR=0x1000000
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_USE_PREBOOT=y
index 1d478078b2c303274ef68caefea0c676608ec868..71d4727ca98da8d0a95c82ae26231a2d59979f63 100644 (file)
@@ -13,7 +13,6 @@
 #include "tegra124-common.h"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTA_BASE
 
 #define FDT_MODULE                     "apalis-v1.2"
index 4f00b3bad3f434cda9958ea90448548d560eaf0d..80204d706d1fc4f3c299b2e8613e33cdc8265fa5 100644 (file)
@@ -20,7 +20,6 @@
  * Apalis UART3: NVIDIA UARTB
  * Apalis UART4: NVIDIA UARTC
  */
-#define CONFIG_TEGRA_ENABLE_UARTA
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTA_BASE
 
 #define UBOOT_UPDATE \
index 7078c2745c8e78e2c9dc3270e661671e4659f406..7e0e47796073cbb9efd120224ea5abc421e7e192 100644 (file)
 
 #include "tegra30-common.h"
 
-/* VDD core PMIC */
-#define CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1
-
 /* High-level configuration options */
 #define CONFIG_TEGRA_BOARD_STRING      "NVIDIA Beaver"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTA_BASE
 
 #include "tegra-common-post.h"
index 5cca1e18348d46515ca9bb37d40dd73301dbc870..64d713a1969190f3109e82e7462e9a08125b3de9 100644 (file)
@@ -10,9 +10,6 @@
 
 #include "tegra30-common.h"
 
-/* VDD core PMIC */
-#define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
-
 /* High-level configuration options */
 #define CONFIG_TEGRA_BOARD_STRING      "NVIDIA Cardhu"
 
@@ -21,7 +18,6 @@
        "fdtfile=tegra30-cardhu-a04.dtb\0"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTA_BASE
 
 #include "tegra-common-post.h"
index e3519ed75169c54d38616dc6c80964a3ec09d585..e49eb602081d82819ffd9b7d1cf2a03f3f877f2b 100644 (file)
@@ -19,7 +19,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "CEI tk1-som"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTD
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTD_BASE
 
 #include "tegra-common-post.h"
index 2ba3c3bc87db2e50fbf6c14949e7544ff4de7803..ea7d648eb6a49125a6228061abe95cb5fa3e5b2a 100644 (file)
@@ -11,8 +11,6 @@
 #include "tegra20-common.h"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
-#define CONFIG_TEGRA_UARTA_SDIO1
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTA_BASE
 
 /* NAND support */
index ffed71a2e828ee10f2907d89e57490e47dd61f93..7edb2c0b26d4b98c28c8730c9ca483d61f7d28bd 100644 (file)
@@ -21,7 +21,6 @@
  * Colibri UART-B: NVIDIA UARTD
  * Colibri UART-C: NVIDIA UARTB
  */
-#define CONFIG_TEGRA_ENABLE_UARTA
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTA_BASE
 
 #define UBOOT_UPDATE \
index 82b2efdfe897bb86063ff0b8faf5dfdeae25975d..c9009e3962370cd9b2e7fe381dbe14fd95536e98 100644 (file)
@@ -14,7 +14,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "NVIDIA Dalmore"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTD
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTD_BASE
 
 /* Environment in eMMC, at the end of 2nd "boot sector" */
index 211dab4d23372f1628458f80ebed30b89fcdb772..a1a66bfb64e0401931e4990d6bd020ab03dea4cc 100644 (file)
@@ -14,7 +14,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "NVIDIA Harmony"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTD
 
 /* UARTD: keyboard satellite board UART, default */
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTD_BASE
index ea4964b13d672ea0ddc42714f919db380c5100f2..aa9e1d811a502b00e91e77a9bcfb5962c9ba5707 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "NVIDIA Jetson TK1"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTD
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTD_BASE
 
 #include "tegra-common-post.h"
index a8d8d8b09e029d092e68e23117242c1192147377..efac0febdf818ccacd3a245c36b4121228ac0ed4 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "Avionic Design Medcom-Wide"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTD      /* UARTD: debug UART */
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTD_BASE
 
 /* NAND support */
index 21002f99dc88c5e0249663b26b9cc0069129846d..e885526e625fcfd5cf4d8c90df48f0afcd316b7d 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "Google/NVIDIA Nyan-big"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTA_BASE
 
 #include "tegra-common-post.h"
index 653b4c583ad20ff481221186f07faf1d3def2522..f426889e1c41f67362c4a5af9e2c288730091491 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "NVIDIA P2371-0000"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
 
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
index 2913d5304be745f4a9804845613c7034e6c14814..24adf4e13f05f830c324b0576ad5e4aa5df5e0bd 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "NVIDIA P2371-2180"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
 
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
index e78e3c4d6b0932ae91939e49865026a8a1d43e70..8a1e7d9b96808a0230a75c6d2d962e79424b833f 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "NVIDIA P2571"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
 
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
index bab02dc2d6eda5e1fcf2f701104d4b7630141ea0..078d35dde2c96df411414cfaa6a211c52e196b87 100644 (file)
@@ -14,7 +14,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "NVIDIA P3450-0000"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
 
 /* Only MMC/PXE/DHCP for now, add USB back in later when supported */
 #define BOOT_TARGET_DEVICES(func) \
index a945f4e9b289770157d1e4abde7e1873fbdf83d7..898167009f6ac331e0ffe16f95715390a21153f2 100644 (file)
@@ -16,7 +16,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "Compal Paz00"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTA_BASE
 
 /* Environment in eMMC, at the end of 2nd "boot sector" */
index 99db59c489e0775fa38c8051b9f3d58e11f3d292..1d8ac618c0b294b89406734668f6aba4e346e4d8 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "Avionic Design Plutux"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTD      /* UARTD: debug UART */
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTD_BASE
 
 /* NAND support */
index f272fe9bf8f1f69c2f2af691a8d93d84679f0482..e5d672746b128e2e4e34b09a8b446df7d19b5b42 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "NVIDIA Seaboard"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTD
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTD_BASE
 
 /* Environment in eMMC, at the end of 2nd "boot sector" */
index c98322cf0845f5c2d142459e3c6aa5d430d7f19f..ae879abe3f86571dd41532578b73685bf2056516 100644 (file)
@@ -13,7 +13,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "Avionic Design Tamonten™ NG Evaluation Carrier"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTD
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTD_BASE
 
 #include "tegra-common-post.h"
index ddf753da4a9fdbcf82aae58a636fdd8d0dff2f92..e8a9df756d52778669f3fd369a0e634a594e6e0b 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "Avionic Design Tamonten Evaluation Carrier"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTD      /* UARTD: debug UART */
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTD_BASE
 
 /* NAND support */
index 69acabf19fdd97a5ceddb1fc920371a1debac498..2c668e0611ba0edc3a3c168b8c64a7d64d4dfe91 100644 (file)
@@ -73,8 +73,4 @@
        BOOTENV \
        BOARD_EXTRA_ENV_SETTINGS
 
-#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) || defined(CONFIG_TEGRA114_SPI)
-#define CONFIG_TEGRA_SPI
-#endif
-
 #endif /* __TEGRA_COMMON_POST_H */
index e4cbc7da843e9d31cb4ed12e029fb90b91dfe2e8..b5bf991220196ddf02682702f3fa56465d3efa6d 100644 (file)
@@ -14,8 +14,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "Compulab Trimslice"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
-#define CONFIG_TEGRA_UARTA_GPU
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTA_BASE
 
 /* SPI */
index a4eb4bf4aaf32601c0e3a8e87a85c6cf3963973c..970893ca17bb4b8049bf31ddf36e8f82dde15075 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "NVIDIA Venice2"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTA_BASE
 
 /* Environment in eMMC, at the end of 2nd "boot sector" */
index f7a507768ec14f135072f047b519213e64539b6c..e7b7b911d9b6bc4817529db0ac37af1c032acbb8 100644 (file)
@@ -14,7 +14,6 @@
 #define CONFIG_TEGRA_BOARD_STRING      "NVIDIA Ventana"
 
 /* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTD
 #define CFG_SYS_NS16550_COM1           NV_PA_APB_UARTD_BASE
 
 /* Environment in eMMC, at the end of 2nd "boot sector" */