At present various drivers etc. access the device's 'seq' member directly.
This makes it harder to change the meaning of that member. Change access
to go through a function instead.
The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
/*
* board file can use this index to locate which i2c_pads_info is for
* i2c_idle_bus. When pinmux is implement, this entry can be
- * discarded. Here we do not use dev->seq, because we do not want to
+ * discarded. Here we do not use dev_seq(dev), because we do not want to
* export device to board file.
*/
int index;
static int cpu_x86_broadwell_probe(struct udevice *dev)
{
- if (dev->seq == 0) {
+ if (dev_seq(dev) == 0) {
cpu_core_init(dev);
return broadwell_init(dev);
}
static int cpu_x86_model_206ax_probe(struct udevice *dev)
{
- if (dev->seq == 0)
+ if (dev_seq(dev) == 0)
model_206ax_init(dev);
return 0;
puts("Boot from EMMC but without SD1 enabled!\n");
return -1;
}
- debug("mmc1 device found at %p, seq %d\n", dev, dev->seq);
+ debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
mode = "mmc";
- bootseq = dev->seq;
+ bootseq = dev_seq(dev);
break;
case SD_MODE:
puts("SD_MODE\n");
puts("Boot from SD0 but without SD0 enabled!\n");
return -1;
}
- debug("mmc0 device found at %p, seq %d\n", dev, dev->seq);
+ debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev));
mode = "mmc";
- bootseq = dev->seq;
+ bootseq = dev_seq(dev);
break;
case SD1_LSHFT_MODE:
puts("LVL_SHFT_");
puts("Boot from SD1 but without SD1 enabled!\n");
return -1;
}
- debug("mmc1 device found at %p, seq %d\n", dev, dev->seq);
+ debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
mode = "mmc";
- bootseq = dev->seq;
+ bootseq = dev_seq(dev);
break;
default:
mode = "";
puts("Boot from EMMC but without SD0 enabled!\n");
return -1;
}
- debug("mmc0 device found at %p, seq %d\n", dev, dev->seq);
+ debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev));
mode = "mmc";
- bootseq = dev->seq;
+ bootseq = dev_seq(dev);
break;
case SD_MODE:
puts("SD_MODE\n");
puts("Boot from SD0 but without SD0 enabled!\n");
return -1;
}
- debug("mmc0 device found at %p, seq %d\n", dev, dev->seq);
+ debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev));
mode = "mmc";
- bootseq = dev->seq;
+ bootseq = dev_seq(dev);
env_set("modeboot", "sdboot");
break;
case SD1_LSHFT_MODE:
puts("Boot from SD1 but without SD1 enabled!\n");
return -1;
}
- debug("mmc1 device found at %p, seq %d\n", dev, dev->seq);
+ debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
mode = "mmc";
- bootseq = dev->seq;
+ bootseq = dev_seq(dev);
env_set("modeboot", "sdboot");
break;
case NAND_MODE:
printf("Bus %d:\t%s", bus->req_seq, bus->name);
if (device_active(bus))
- printf(" (active %d)", bus->seq);
+ printf(" (active %d)", dev_seq(bus));
printf("\n");
for (device_find_first_child(bus, &dev);
dev;
struct udevice *bus;
if (!axi_get_cur_bus(&bus))
- bus_no = bus->seq;
+ bus_no = dev_seq(bus);
else
bus_no = -1;
int ret, i;
ret = cpu_get_desc(dev, buf, sizeof(buf));
- printf("%3d: %-10s %s\n", dev->seq, dev->name,
+ printf("%3d: %-10s %s\n", dev_seq(dev), dev->name,
ret ? "<no description>" : buf);
if (!detail)
continue;
printf("Bus %d:\t%s", bus->req_seq, bus->name);
if (device_active(bus))
- printf(" (active %d)", bus->seq);
+ printf(" (active %d)", dev_seq(bus));
printf("\n");
for (device_find_first_child(bus, &dev);
dev;
struct udevice *bus;
if (!i2c_get_cur_bus(&bus))
- bus_no = bus->seq;
+ bus_no = dev_seq(bus);
else
bus_no = -1;
#else
for (uclass_first_device(UCLASS_MISC, &dev);
dev;
uclass_next_device(&dev)) {
- printf("%-20s %5d %10s\n", dev->name, dev->seq,
+ printf("%-20s %5d %10s\n", dev->name, dev_seq(dev),
dev->driver->name);
}
{
printf("OSD %d:\t%s", osd->req_seq, osd->name);
if (device_active(osd))
- printf(" (active %d)", osd->seq);
+ printf(" (active %d)", dev_seq(osd));
printf("\n");
}
struct udevice *osd;
if (!osd_get_osd_cur(&osd))
- osd_no = osd->seq;
+ osd_no = dev_seq(osd);
else
osd_no = -1;
printf("Current osd is %d\n", osd_no);
{
struct udevice *dev;
- pciinfo_header(bus->seq, short_listing);
+ pciinfo_header(dev_seq(bus), short_listing);
for (device_find_first_child(bus, &dev);
dev;
pplat = dev_get_parent_plat(dev);
if (short_listing) {
- printf("%02x.%02x.%02x ", bus->seq,
+ printf("%02x.%02x.%02x ", dev_seq(bus),
PCI_DEV(pplat->devfn), PCI_FUNC(pplat->devfn));
pci_header_show_brief(dev);
} else {
- printf("\nFound PCI device %02x.%02x.%02x:\n", bus->seq,
+ printf("\nFound PCI device %02x.%02x.%02x:\n",
+ dev_seq(bus),
PCI_DEV(pplat->devfn), PCI_FUNC(pplat->devfn));
pci_header_show(dev);
}
return CMD_RET_USAGE;
}
- printf("dev: %d @ %s\n", currdev->seq, currdev->name);
+ printf("dev: %d @ %s\n", dev_seq(currdev), currdev->name);
}
return CMD_RET_SUCCESS;
printf("| %-*.*s| %-*.*s| %s @ %d\n",
LIMIT_DEV, LIMIT_DEV, dev->name,
LIMIT_PARENT, LIMIT_PARENT, dev->parent->name,
- dev_get_uclass_name(dev->parent), dev->parent->seq);
+ dev_get_uclass_name(dev->parent), dev_seq(dev->parent));
}
if (ret)
break;
}
printf("%d - Name:'%s' type:'%s' supports: %s%s%s%s%s%s\n",
- dev->seq,
+ dev_seq(dev),
uc_pdata->name,
type,
ops->load ? "load " : "",
printf("one wire interface not found\n");
return CMD_RET_FAILURE;
}
- printf("Bus %d:\t%s", bus->seq, bus->name);
+ printf("Bus %d:\t%s", dev_seq(bus), bus->name);
if (device_active(bus))
printf(" (active)");
printf("\n");
device_find_next_child(&dev)) {
ret = device_probe(dev);
- printf("\t%s (%d) uclass %s : ", dev->name, dev->seq,
+ printf("\t%s (%d) uclass %s : ", dev->name, dev_seq(dev),
dev->uclass->uc_drv->name);
if (ret)
return -ENODEV;
list_for_each_entry(dev, &parent->child_head, sibling_node) {
- if ((find_req_seq ? dev->req_seq : dev->seq) ==
+ if ((find_req_seq ? dev->req_seq : dev_seq(dev)) ==
seq_or_req_seq) {
*devp = dev;
return 0;
printf("%-3i %c %s @ %08lx", index,
dev->flags & DM_FLAG_ACTIVATED ? '*' : ' ',
dev->name, (ulong)map_to_sysmem(dev));
- if (dev->seq != -1 || dev->req_seq != -1)
- printf(", seq %d, (req %d)", dev->seq, dev->req_seq);
+ if (dev_seq(dev) != -1 || dev->req_seq != -1)
+ printf(", seq %d, (req %d)", dev_seq(dev), dev->req_seq);
puts("\n");
}
uclass_foreach_dev(dev, uc) {
log_debug(" - %d %d '%s'\n",
- dev->req_seq, dev->seq, dev->name);
- if ((find_req_seq ? dev->req_seq : dev->seq) ==
+ dev->req_seq, dev_seq(dev), dev->name);
+ if ((find_req_seq ? dev->req_seq : dev_seq(dev)) ==
seq_or_req_seq) {
*devp = dev;
log_debug(" - found\n");
int seq = 0;
int ret;
- assert(dev->seq == -1);
+ assert(dev_seq(dev) == -1);
ret = uclass_find_device_by_seq(uc_drv->id, dev->req_seq, false, &dup);
if (!ret) {
dm_warn("Device '%s': seq %d is in use by '%s'\n",
uc_priv->bank_name = strdup(dev->name);
end = strchr(uc_priv->bank_name, '@');
- end[0] = 'A' + dev->seq;
+ end[0] = 'A' + dev_seq(dev);
end[1] = '\0';
debug("%s(%s): base address: %p, pin count: %d\n",
{
struct ast2500_scu *scu;
- debug("Enabling I2C%u\n", dev->seq);
+ debug("Enabling I2C%u\n", dev_seq(dev));
/*
* Get all I2C devices out of Reset.
struct ast_i2c_regs *regs = priv->regs;
ulong i2c_rate, divider;
- debug("Setting speed for I2C%d to <%u>\n", dev->seq, speed);
+ debug("Setting speed for I2C%d to <%u>\n", dev_seq(dev), speed);
if (!speed) {
debug("No valid speed specified\n");
return -EINVAL;
{
struct i2c_bus *i2c_bus = dev_get_priv(dev);
- i2c_bus->id = dev->seq;
+ i2c_bus->id = dev_seq(dev);
i2c_bus->regs = dev_read_addr_ptr(dev);
i2c_bus->speed = 100000;
dev_read_u32_default(dev, "clock-frequency",
I2C_SPEED_STANDARD_RATE);
i2c_bus->node = node;
- i2c_bus->bus_num = dev->seq;
+ i2c_bus->bus_num = dev_seq(dev);
exynos_pinmux_config(i2c_bus->id, PINMUX_FLAG_HS_MODE);
i2c_gpio_send_stop(bus, delay);
debug("%s: bus: %d (%s) chip: %x flags: %x ret: %d\n",
- __func__, dev->seq, dev->name, chip, chip_flags, ret);
+ __func__, dev_seq(dev), dev->name, chip, chip_flags, ret);
return ret;
}
return clock_rate;
}
} else {
- clock_rate = imx_get_i2cclk(bus->seq);
+ clock_rate = imx_get_i2cclk(dev_seq(bus));
if (!clock_rate)
return -EPERM;
}
val = readl(®s->mcr) & ~LPI2C_MCR_MEN_MASK;
writel(val | LPI2C_MCR_MEN(1), ®s->mcr);
- debug("i2c : controller bus %d, speed %d:\n", bus->seq, speed);
+ debug("i2c : controller bus %d, speed %d:\n", dev_seq(bus), speed);
return ret;
}
return -EINVAL;
i2c_bus->base = addr;
- i2c_bus->index = bus->seq;
+ i2c_bus->index = dev_seq(bus);
i2c_bus->bus = bus;
/* power up i2c resource */
- ret = init_i2c_power(bus->seq);
+ ret = init_i2c_power(dev_seq(bus));
if (ret) {
debug("init_i2c_power err = %d\n", ret);
return ret;
}
} else {
/* To i.MX7ULP, only i2c4-7 can be handled by A7 core */
- ret = enable_i2c_clk(1, bus->seq);
+ ret = enable_i2c_clk(1, dev_seq(bus));
if (ret < 0)
return ret;
}
return ret;
debug("i2c : controller bus %d at 0x%lx , speed %d: ",
- bus->seq, i2c_bus->base,
+ dev_seq(bus), i2c_bus->base,
i2c_bus->speed);
return 0;
static int lpc32xx_i2c_probe(struct udevice *bus)
{
struct lpc32xx_i2c_dev *dev = dev_get_plat(bus);
- bus->seq = dev->index;
+
+ /*
+ * FIXME: This is not permitted
+ * dev_seq(bus) = dev->index;
+ */
__i2c_init(dev->base, dev->speed, 0, dev->index);
return 0;
}
i2c_bus->base = addr;
- i2c_bus->index = bus->seq;
+ i2c_bus->index = dev_seq(bus);
i2c_bus->bus = bus;
/* Enable clk */
return ret;
}
#else
- ret = enable_i2c_clk(1, bus->seq);
+ ret = enable_i2c_clk(1, dev_seq(bus));
if (ret < 0)
return ret;
#endif
ret = fdt_stringlist_search(fdt, node, "pinctrl-names", "gpio");
if (ret < 0) {
debug("i2c bus %d at 0x%2lx, no gpio pinctrl state.\n",
- bus->seq, i2c_bus->base);
+ dev_seq(bus), i2c_bus->base);
} else {
ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
"scl-gpios", 0, &i2c_bus->scl_gpio,
ret || ret2) {
dev_err(bus,
"i2c bus %d at %lu, fail to request scl/sda gpio\n",
- bus->seq, i2c_bus->base);
+ dev_seq(bus), i2c_bus->base);
return -EINVAL;
}
}
*/
debug("i2c : controller bus %d at %lu , speed %d: ",
- bus->seq, i2c_bus->base,
+ dev_seq(bus), i2c_bus->base,
i2c_bus->speed);
return 0;
return -EINVAL;
bus->regs = (struct nx_i2c_regs *)addr;
- bus->bus_num = dev->seq;
+ bus->bus_num = dev_seq(dev);
/* i2c node parsing */
i2c_process_node(dev);
if (ret)
return ret;
- debug("TWSI bus %d at %p\n", dev->seq, twsi->base);
+ debug("TWSI bus %d at %p\n", dev_seq(dev), twsi->base);
/* Start with standard speed, real speed set via DT or cmd */
return twsi_init(twsi->base, i2c_slave_addr);
dev_read_u32_default(dev, "clock-frequency",
I2C_SPEED_STANDARD_RATE);
i2c_bus->node = node;
- i2c_bus->bus_num = dev->seq;
+ i2c_bus->bus_num = dev_seq(dev);
exynos_pinmux_config(i2c_bus->id, 0);
int ret;
bool is_dvc;
- i2c_bus->id = dev->seq;
+ i2c_bus->id = dev_seq(dev);
i2c_bus->type = dev_get_driver_data(dev);
i2c_bus->regs = (struct i2c_ctlr *)dev_read_addr(dev);
if ((ulong)i2c_bus->regs == FDT_ADDR_T_NONE) {
}
i2c_init_controller(i2c_bus);
debug("%s: controller bus %d at %p, speed %d: ",
- is_dvc ? "dvc" : "i2c", dev->seq, i2c_bus->regs, i2c_bus->speed);
+ is_dvc ? "dvc" : "i2c", dev_seq(dev), i2c_bus->regs,
+ i2c_bus->speed);
return 0;
}
* work as expected.
*/
- init_clk_usdhc(dev->seq);
+ init_clk_usdhc(dev_seq(dev));
#if CONFIG_IS_ENABLED(CLK)
/* Assigned clock already set clock */
priv->sdhc_clk = clk_get_rate(&priv->per_clk);
#else
- priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq);
+ priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev_seq(dev));
if (priv->sdhc_clk <= 0) {
dev_err(dev, "Unable to get clk for %s\n", dev->name);
return -EINVAL;
int ret = 0;
int cs = -1;
- debug("%s: bus %d, looking for emul=%p: ", __func__, bus->seq, dev);
+ debug("%s: bus %d, looking for emul=%p: ", __func__, dev_seq(bus), dev);
ret = sandbox_spi_get_emul(state, bus, dev, &emul);
if (ret) {
printf("Error: Unknown chip select for device '%s'\n",
struct udevice **emulp)
{
struct sandbox_spi_info *info;
- int busnum = bus->seq;
+ int busnum = dev_seq(bus);
int cs = spi_chip_select(slave);
int ret;
fec_reg_setup(priv);
- priv->dev_id = dev->seq;
+ priv->dev_id = dev_seq(dev);
#ifdef CONFIG_DM_ETH_PHY
bus = eth_phy_get_mdio_bus(dev);
if (!bus) {
#ifdef CONFIG_FEC_MXC_MDIO_BASE
- bus = fec_get_miibus((ulong)CONFIG_FEC_MXC_MDIO_BASE, dev->seq);
+ bus = fec_get_miibus((ulong)CONFIG_FEC_MXC_MDIO_BASE,
+ dev_seq(dev));
#else
- bus = fec_get_miibus((ulong)priv->eth, dev->seq);
+ bus = fec_get_miibus((ulong)priv->eth, dev_seq(dev));
#endif
}
if (!bus) {
#ifdef CONFIG_DM_ETH
struct eth_pdata *plat = dev_get_plat(eth_dev);
unsigned char *enetaddr = plat->enetaddr;
- int eth_index = eth_dev->seq;
+ int eth_index = dev_seq(eth_dev);
#else
unsigned char *enetaddr = eth_dev->enetaddr;
int eth_index = eth_dev->index;
int retval;
const u32 *val;
- info->index = dev->seq;
+ info->index = dev_seq(dev);
info->iobase = pdata->iobase;
info->miibase = pdata->iobase;
info->phy_addr = -1;
bus->write = ftgmac100_mdio_write;
bus->priv = priv;
- ret = mdio_register_seq(bus, dev->seq);
+ ret = mdio_register_seq(bus, dev_seq(dev));
if (ret) {
free(bus);
return ret;
bus->priv = priv;
priv->bus = bus;
- ret = mdio_register_seq(bus, dev->seq);
+ ret = mdio_register_seq(bus, dev_seq(dev));
if (ret)
return ret;
int retval, fec_idx;
const u32 *val;
- info->index = dev->seq;
+ info->index = dev_seq(dev);
info->iobase = pdata->iobase;
info->phy_addr = -1;
* u-boot framework updates MAC to random address.
* Use this hook to update mac address in environment.
*/
- if (!eth_env_get_enetaddr_by_index("eth", dev->seq, ethaddr)) {
- eth_env_set_enetaddr_by_index("eth", dev->seq, pdata->enetaddr);
+ if (!eth_env_get_enetaddr_by_index("eth", dev_seq(dev), ethaddr)) {
+ eth_env_set_enetaddr_by_index("eth", dev_seq(dev),
+ pdata->enetaddr);
debug("%s: pMAC %pM\n", __func__, pdata->enetaddr);
}
- eth_env_get_enetaddr_by_index("eth", dev->seq, ethaddr);
+ eth_env_get_enetaddr_by_index("eth", dev_seq(dev), ethaddr);
if (memcmp(ethaddr, pdata->enetaddr, ARP_HLEN)) {
debug("%s: pMAC %pM\n", __func__, pdata->enetaddr);
nicvf_hw_set_mac_addr(nic, dev);
if (is_valid_ethaddr(ethaddr)) {
memcpy(pdata->enetaddr, ethaddr, ARP_HLEN);
- eth_env_set_enetaddr_by_index("eth", dev->seq, ethaddr);
+ eth_env_set_enetaddr_by_index("eth", dev_seq(dev), ethaddr);
}
debug("%s enetaddr %pM ethaddr %pM\n", __func__,
pdata->enetaddr, ethaddr);
priv = malloc(sizeof(*priv));
if (!bus || !priv) {
printf("Failed to allocate OcteonTX MDIO bus # %u\n",
- dev->seq);
+ dev_seq(dev));
return -1;
}
*/
if (memcmp(nix->lmac->mac_addr, pdata->enetaddr, ARP_HLEN)) {
memcpy(nix->lmac->mac_addr, pdata->enetaddr, 6);
- eth_env_set_enetaddr_by_index("eth", rvu->dev->seq,
+ eth_env_set_enetaddr_by_index("eth", dev_seq(rvu->dev),
pdata->enetaddr);
cgx_lmac_mac_filter_setup(nix->lmac);
/* Update user given MAC address to ATF for update
/* to make post_probe happy */
if (is_valid_ethaddr(nix->lmac->mac_addr)) {
memcpy(pdata->enetaddr, nix->lmac->mac_addr, 6);
- eth_env_set_enetaddr_by_index("eth", rvu->dev->seq,
+ eth_env_set_enetaddr_by_index("eth", dev_seq(rvu->dev),
pdata->enetaddr);
}
debug("%s: name: %s\n", __func__, dev->name);
rvu->pf_base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_2, PCI_REGION_MEM);
- rvu->pfid = dev->seq + 1; // RVU PF's start from 1;
+ rvu->pfid = dev_seq(dev) + 1; // RVU PF's start from 1;
rvu->dev = dev;
if (!rvu_af_dev) {
printf("%s: Error: Could not find RVU AF device\n",
* modify device name to include index/sequence number,
* for better readability, this is 1:1 mapping with eth0/1/2.. names.
*/
- sprintf(name, "rvu_pf#%d", dev->seq);
+ sprintf(name, "rvu_pf#%d", dev_seq(dev));
device_set_name(dev, name);
debug("%s: name: %s\n", __func__, dev->name);
return err;
priv->bus->write = axiemac_miiphy_write;
priv->bus->priv = priv;
- ret = mdio_register_seq(priv->bus, dev->seq);
+ ret = mdio_register_seq(priv->bus, dev_seq(dev));
if (ret)
return ret;
emaclite->bus->write = emaclite_miiphy_write;
emaclite->bus->priv = emaclite;
- ret = mdio_register_seq(emaclite->bus, dev->seq);
+ ret = mdio_register_seq(emaclite->bus, dev_seq(dev));
if (ret)
return ret;
priv->bus->write = zynq_gem_miiphy_write;
priv->bus->priv = priv;
- ret = mdio_register_seq(priv->bus, dev->seq);
+ ret = mdio_register_seq(priv->bus, dev_seq(dev));
if (ret)
goto err2;
dev_warn(pcie->dev, "PCIE Reset on GPIO support is missing\n");
}
- pcie->first_busno = dev->seq;
+ pcie->first_busno = dev_seq(dev);
pcie->dev = pci_get_controller(dev);
return pcie_advk_setup_hw(pcie);
if (!device_active(bus))
log_err("PCI: Device '%s' on unprobed bus '%s'\n", dev->name,
bus->name);
- return PCI_ADD_BUS(bus->seq, pplat->devfn);
+ return PCI_ADD_BUS(dev_seq(bus), pplat->devfn);
}
/**
ret = uclass_get(UCLASS_PCI, &uc);
uclass_foreach_dev(bus, uc) {
- if (bus->seq > ret)
- ret = bus->seq;
+ if (dev_seq(bus) > ret)
+ ret = dev_seq(bus);
}
debug("%s: ret=%d\n", __func__, ret);
struct udevice *parent = dev->parent;
u16 bc;
- while (parent->seq != 0) {
+ while (dev_seq(parent) != 0) {
dm_pci_read_config16(parent, PCI_BRIDGE_CONTROL, &bc);
bc |= PCI_BRIDGE_CTL_VGA;
dm_pci_write_config16(parent, PCI_BRIDGE_CONTROL, bc);
struct udevice *dev;
int ret;
- sub_bus = bus->seq;
+ sub_bus = dev_seq(bus);
debug("%s: start\n", __func__);
pciauto_config_init(hose);
for (ret = device_find_first_child(bus, &dev);
}
if (!ea_pos) {
- if (sub_bus != bus->seq) {
+ if (sub_bus != dev_seq(bus)) {
debug("%s: Internal error, bus '%s' got seq %d, expected %d\n",
- __func__, bus->name, bus->seq, sub_bus);
+ __func__, bus->name, dev_seq(bus), sub_bus);
return -EPIPE;
}
sub_bus = pci_get_bus_max();
return -EPERM;
/* Bind a generic driver so that the device can be used */
- sprintf(name, "pci_%x:%x.%x", parent->seq, PCI_DEV(bdf),
+ sprintf(name, "pci_%x:%x.%x", dev_seq(parent), PCI_DEV(bdf),
PCI_FUNC(bdf));
str = strdup(name);
if (!str)
int ret;
found_multi = false;
- end = PCI_BDF(bus->seq, PCI_MAX_PCI_DEVICES - 1,
+ end = PCI_BDF(dev_seq(bus), PCI_MAX_PCI_DEVICES - 1,
PCI_MAX_PCI_FUNCTIONS - 1);
- for (bdf = PCI_BDF(bus->seq, 0, 0); bdf <= end;
+ for (bdf = PCI_BDF(dev_seq(bus), 0, 0); bdf <= end;
bdf += PCI_BDF(0, 0, 1)) {
struct pci_child_plat *pplat;
struct udevice *dev;
found_multi = header_type & 0x80;
debug("%s: bus %d/%s: found device %x, function %d", __func__,
- bus->seq, bus->name, PCI_DEV(bdf), PCI_FUNC(bdf));
+ dev_seq(bus), bus->name, PCI_DEV(bdf), PCI_FUNC(bdf));
pci_bus_read_config(bus, bdf, PCI_DEVICE_ID, &device,
PCI_SIZE_16);
pci_bus_read_config(bus, bdf, PCI_CLASS_REVISION, &class,
{
struct pci_controller *hose;
- debug("%s, bus=%d/%s, parent=%s\n", __func__, bus->seq, bus->name,
+ debug("%s, bus=%d/%s, parent=%s\n", __func__, dev_seq(bus), bus->name,
bus->parent->name);
hose = bus->uclass_priv;
hose->ctlr = parent_hose->bus;
}
hose->bus = bus;
- hose->first_busno = bus->seq;
- hose->last_busno = bus->seq;
+ hose->first_busno = dev_seq(bus);
+ hose->last_busno = dev_seq(bus);
if (dev_of_valid(bus)) {
hose->skip_auto_config_until_reloc =
dev_read_bool(bus,
struct pci_controller *hose = dev_get_uclass_priv(bus);
int ret;
- debug("%s: probing bus %d\n", __func__, bus->seq);
+ debug("%s: probing bus %d\n", __func__, dev_seq(bus));
ret = pci_bind_bus_devices(bus);
if (ret)
return ret;
* Note we only call this 1) after U-Boot is relocated, and 2)
* root bus has finished probing.
*/
- if ((gd->flags & GD_FLG_RELOC) && bus->seq == 0 && ll_boot_init()) {
+ if ((gd->flags & GD_FLG_RELOC) && dev_seq(bus) == 0 && ll_boot_init()) {
ret = fsp_init_phase_pci();
if (ret)
return ret;
&class, PCI_SIZE_16);
debug("%s: bus %d/%s: found VF %x:%x\n", __func__,
- bus->seq, bus->name, PCI_DEV(bdf), PCI_FUNC(bdf));
+ dev_seq(bus), bus->name, PCI_DEV(bdf), PCI_FUNC(bdf));
/* Find this device in the device tree */
ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), &dev);
pplat->virtid = vf * vf_stride + vf_offset;
debug("%s: bus %d/%s: found VF %x:%x %x:%x class %lx id %x\n",
- __func__, dev->seq, dev->name, PCI_DEV(bdf),
+ __func__, dev_seq(dev), dev->name, PCI_DEV(bdf),
PCI_FUNC(bdf), vendor, device, class, pplat->virtid);
bdf += PCI_BDF(0, 0, vf_stride);
}
/* Configure bus number registers */
dm_pci_write_config8(dev, PCI_PRIMARY_BUS,
- PCI_BUS(dm_pci_get_bdf(dev)) - ctlr->seq);
- dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus - ctlr->seq);
+ PCI_BUS(dm_pci_get_bdf(dev)) - dev_seq(ctlr));
+ dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus - dev_seq(ctlr));
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff);
if (pci_mem) {
pci_io = ctlr_hose->pci_io;
/* Configure bus number registers */
- dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - ctlr->seq);
+ dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - dev_seq(ctlr));
if (pci_mem) {
/* Round memory allocator to 1MB boundary */
debug("PCIE Reset on GPIO support is missing\n");
#endif /* DM_GPIO */
- pcie->first_busno = dev->seq;
+ pcie->first_busno = dev_seq(dev);
/* Don't register host if link is down */
if (!pcie_dw_mvebu_pcie_link_up(pcie->ctrl_base, LINK_SPEED_GEN_3)) {
- printf("PCIE-%d: Link down\n", dev->seq);
+ printf("PCIE-%d: Link down\n", dev_seq(dev));
} else {
- printf("PCIE-%d: Link up (Gen%d-x%d, Bus%d)\n", dev->seq,
+ printf("PCIE-%d: Link up (Gen%d-x%d, Bus%d)\n", dev_seq(dev),
pcie_dw_get_link_speed(pcie->ctrl_base),
pcie_dw_get_link_width(pcie->ctrl_base),
hose->first_busno);
generic_phy_init(&phy1);
generic_phy_power_on(&phy1);
- pci->first_busno = dev->seq;
+ pci->first_busno = dev_seq(dev);
pci->dev = dev;
pcie_dw_setup_host(pci);
pcie_am654_set_mode(pci, DW_PCIE_RC_TYPE);
if (!pcie_dw_ti_pcie_link_up(pci, LINK_SPEED_GEN_2)) {
- printf("PCIE-%d: Link down\n", dev->seq);
+ printf("PCIE-%d: Link down\n", dev_seq(dev));
return -ENODEV;
}
- printf("PCIE-%d: Link up (Gen%d-x%d, Bus%d)\n", dev->seq,
+ printf("PCIE-%d: Link up (Gen%d-x%d, Bus%d)\n", dev_seq(dev),
pcie_dw_get_link_speed(pci),
pcie_dw_get_link_width(pci),
hose->first_busno);
{
struct generic_ecam_pcie *pcie = dev_get_priv(dev);
- pcie->first_busno = dev->seq;
+ pcie->first_busno = dev_seq(dev);
return 0;
}
if (!pcie->enabled)
return -ENXIO;
- if (PCI_BUS(bdf) < bus->seq)
+ if (PCI_BUS(bdf) < dev_seq(bus))
return -EINVAL;
- if (PCI_BUS(bdf) > bus->seq && (!fsl_pcie_link_up(pcie) || pcie->mode))
+ if (PCI_BUS(bdf) > dev_seq(bus) && (!fsl_pcie_link_up(pcie) || pcie->mode))
return -EINVAL;
- if (PCI_BUS(bdf) == bus->seq && (PCI_DEV(bdf) > 0 || PCI_FUNC(bdf) > 0))
+ if (PCI_BUS(bdf) == dev_seq(bus) && (PCI_DEV(bdf) > 0 || PCI_FUNC(bdf) > 0))
return -EINVAL;
- if (PCI_BUS(bdf) == (bus->seq + 1) && (PCI_DEV(bdf) > 0))
+ if (PCI_BUS(bdf) == (dev_seq(bus) + 1) && (PCI_DEV(bdf) > 0))
return -EINVAL;
return 0;
return 0;
}
- bdf = bdf - PCI_BDF(bus->seq, 0, 0);
+ bdf = bdf - PCI_BDF(dev_seq(bus), 0, 0);
val = bdf | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000;
out_be32(®s->cfg_addr, val);
if (fsl_pcie_addr_valid(pcie, bdf))
return 0;
- bdf = bdf - PCI_BDF(bus->seq, 0, 0);
+ bdf = bdf - PCI_BDF(dev_seq(bus), 0, 0);
val = bdf | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000;
out_be32(®s->cfg_addr, val);
int ret;
struct udevice *bus = pcie->bus;
- ret = fsl_pcie_read_config(bus, PCI_BDF(bus->seq, 0, 0),
+ ret = fsl_pcie_read_config(bus, PCI_BDF(dev_seq(bus), 0, 0),
offset, valuep, size);
return ret;
{
struct udevice *bus = pcie->bus;
- return fsl_pcie_write_config(bus, PCI_BDF(bus->seq, 0, 0),
+ return fsl_pcie_write_config(bus, PCI_BDF(dev_seq(bus), 0, 0),
offset, value, size);
}
struct intel_fpga_pcie *pcie = dev_get_priv(dev);
pcie->bus = pci_get_controller(dev);
- pcie->first_busno = dev->seq;
+ pcie->first_busno = dev_seq(dev);
/* clear all interrupts */
cra_writel(pcie, P2A_INT_STS_ALL, P2A_INT_STATUS);
for (bus = dev; device_is_on_pci_bus(bus);)
bus = bus->parent;
- bdf = entry->bdf - PCI_BDF(bus->seq, 0, 0) + (vf_offset << 8);
+ bdf = entry->bdf - PCI_BDF(dev_seq(bus), 0, 0) + (vf_offset << 8);
for (i = 0; i < entry->num_vfs; i++) {
if (fdt_fixup_pcie_device_ls(blob, bdf, pcie_rc) < 0)
pcie_rc = dev_get_priv(bus);
/* the DT fixup must be relative to the hose first_busno */
- bdf = dm_pci_get_bdf(dev) - PCI_BDF(bus->seq, 0, 0);
+ bdf = dm_pci_get_bdf(dev) - PCI_BDF(dev_seq(bus), 0, 0);
if (fdt_fixup_pcie_device_ls(blob, bdf, pcie_rc) < 0)
break;
if (!pcie->enabled)
return -ENXIO;
- if (PCI_BUS(bdf) < bus->seq)
+ if (PCI_BUS(bdf) < dev_seq(bus))
return -EINVAL;
- if ((PCI_BUS(bdf) > bus->seq) && (!ls_pcie_g4_link_up(pcie)))
+ if ((PCI_BUS(bdf) > dev_seq(bus)) && (!ls_pcie_g4_link_up(pcie)))
return -EINVAL;
- if (PCI_BUS(bdf) <= (bus->seq + 1) && (PCI_DEV(bdf) > 0))
+ if (PCI_BUS(bdf) <= (dev_seq(bus) + 1) && (PCI_DEV(bdf) > 0))
return -EINVAL;
return 0;
struct udevice *bus = pcie->bus;
u32 target;
- if (PCI_BUS(bdf) == bus->seq) {
+ if (PCI_BUS(bdf) == dev_seq(bus)) {
if (offset < INDIRECT_ADDR_BNDRY) {
ccsr_set_page(pcie, 0);
return pcie->ccsr + offset;
return pcie->ccsr + OFFSET_TO_PAGE_ADDR(offset);
}
- target = PAB_TARGET_BUS(PCI_BUS(bdf) - bus->seq) |
+ target = PAB_TARGET_BUS(PCI_BUS(bdf) - dev_seq(bus)) |
PAB_TARGET_DEV(PCI_DEV(bdf)) |
PAB_TARGET_FUNC(PCI_FUNC(bdf));
}
/* the DT fixup must be relative to the hose first_busno */
- bdf = dm_pci_get_bdf(dev) - PCI_BDF(bus->seq, 0, 0);
+ bdf = dm_pci_get_bdf(dev) - PCI_BDF(dev_seq(bus), 0, 0);
/* map PCI b.d.f to streamID in LUT */
ls_pcie_g4_lut_set_mapping(pcie, index, bdf >> 8, streamid);
/* update msi-map in device tree */
if (!pcie_rc->enabled)
return -ENXIO;
- if (PCI_BUS(bdf) < bus->seq)
+ if (PCI_BUS(bdf) < dev_seq(bus))
return -EINVAL;
- if ((PCI_BUS(bdf) > bus->seq) && (!ls_pcie_link_up(pcie)))
+ if ((PCI_BUS(bdf) > dev_seq(bus)) && (!ls_pcie_link_up(pcie)))
return -EINVAL;
- if (PCI_BUS(bdf) <= (bus->seq + 1) && (PCI_DEV(bdf) > 0))
+ if (PCI_BUS(bdf) <= (dev_seq(bus) + 1) && (PCI_DEV(bdf) > 0))
return -EINVAL;
return 0;
if (ls_pcie_addr_valid(pcie_rc, bdf))
return -EINVAL;
- if (PCI_BUS(bdf) == bus->seq) {
+ if (PCI_BUS(bdf) == dev_seq(bus)) {
*paddress = pcie->dbi + offset;
return 0;
}
- busdev = PCIE_ATU_BUS(PCI_BUS(bdf) - bus->seq) |
+ busdev = PCIE_ATU_BUS(PCI_BUS(bdf) - dev_seq(bus)) |
PCIE_ATU_DEV(PCI_DEV(bdf)) |
PCIE_ATU_FUNC(PCI_FUNC(bdf));
- if (PCI_BUS(bdf) == bus->seq + 1) {
+ if (PCI_BUS(bdf) == dev_seq(bus) + 1) {
ls_pcie_cfg0_set_busdev(pcie_rc, busdev);
*paddress = pcie_rc->cfg0 + offset;
} else {
return NULL;
}
- while (dev->parent->seq != 0)
+ while (dev_seq(dev->parent) != 0)
dev = dev->parent;
pplat = dev_get_parent_plat(dev);
/* Configure Address Translation. */
ret = rockchip_pcie_atr_init(priv);
if (ret) {
- dev_err(dev, "PCIE-%d: ATR init failed\n", dev->seq);
+ dev_err(dev, "PCIE-%d: ATR init failed\n", dev_seq(dev));
goto err_power_off_phy;
}
struct pci_controller *hose = dev_get_uclass_priv(ctlr);
int ret;
- priv->first_busno = dev->seq;
+ priv->first_busno = dev_seq(dev);
priv->dev = dev;
ret = rockchip_pcie_parse_dt(dev);
return ret;
dev_info(dev, "PCIE-%d: Link up (Bus%d)\n",
- dev->seq, hose->first_busno);
+ dev_seq(dev), hose->first_busno);
return 0;
}
{
struct coldfire_serial_plat *plat = dev->plat;
- plat->port = dev->seq;
+ plat->port = dev_seq(dev);
return mcf_serial_init_common((uart_t *)plat->base,
plat->port, plat->baudrate);
plat->reg = (struct s5p_uart *)addr;
plat->port_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
- "id", dev->seq);
+ "id", dev_seq(dev));
return 0;
}
uint32_t reg, data, start;
debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
- bus->seq, slave_plat->cs, bitlen, bytes, flags);
+ dev_seq(bus), slave_plat->cs, bitlen, bytes, flags);
if (bitlen == 0)
goto done;
cfspi->baudrate = max_hz;
/* Read current setup */
- bus_setup = readl(&dspi->ctar[bus->seq]);
+ bus_setup = readl(&dspi->ctar[dev_seq(bus)]);
tmp = (prescaler[3] * scaler[15]);
/* Maximum and minimum baudrate it can handle */
bus_setup &= ~(DSPI_CTAR_PBR(0x03) | DSPI_CTAR_BR(0x0f));
bus_setup |= (DSPI_CTAR_PBR(best_i) | DSPI_CTAR_BR(best_j));
- writel(bus_setup, &dspi->ctar[bus->seq]);
+ writel(bus_setup, &dspi->ctar[dev_seq(bus)]);
return 0;
}
if (cfspi->mode & SPI_MODE_MOD) {
if ((cfspi->mode & SPI_MODE_XFER_SZ_MASK) == 0)
bus_setup |=
- readl(&dspi->ctar[bus->seq]) & MCF_FRM_SZ_16BIT;
+ readl(&dspi->ctar[dev_seq(bus)]) & MCF_FRM_SZ_16BIT;
else
bus_setup |=
((cfspi->mode & SPI_MODE_XFER_SZ_MASK) >> 1);
bus_setup |= (cfspi->mode & SPI_MODE_DLY_SCA_MASK) >> 4;
} else {
bus_setup |=
- (readl(&dspi->ctar[bus->seq]) & MCF_CTAR_MODE_MASK);
+ (readl(&dspi->ctar[dev_seq(bus)]) & MCF_CTAR_MODE_MASK);
}
cfspi->charbit =
- ((readl(&dspi->ctar[bus->seq]) & MCF_FRM_SZ_16BIT) ==
+ ((readl(&dspi->ctar[dev_seq(bus)]) & MCF_FRM_SZ_16BIT) ==
MCF_FRM_SZ_16BIT) ? 16 : 8;
- setbits_be32(&dspi->ctar[bus->seq], bus_setup);
+ setbits_be32(&dspi->ctar[dev_seq(bus)], bus_setup);
return 0;
}
DSPI_MCR_CRXF | DSPI_MCR_CTXF;
fsl_dspi_init_mcr(priv, mcr_cfg_val);
- debug("%s probe done, bus-num %d.\n", bus->name, bus->seq);
+ debug("%s probe done, bus-num %d.\n", bus->name, dev_seq(bus));
return 0;
}
priv = dev_get_priv(bus);
/* processor special preparation work */
- cpu_dspi_claim_bus(bus->seq, slave_plat->cs);
+ cpu_dspi_claim_bus(dev_seq(bus), slave_plat->cs);
/* configure transfer mode */
fsl_dspi_cfg_ctar_mode(priv, slave_plat->cs, priv->mode);
dspi_halt(priv, 1);
/* processor special release work */
- cpu_dspi_release_bus(bus->seq, slave_plat->cs);
+ cpu_dspi_release_bus(dev_seq(bus), slave_plat->cs);
return 0;
}
fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
fsl->speed_hz = plat->speed_hz;
- debug("%s probe done, bus-num %d.\n", bus->name, bus->seq);
+ debug("%s probe done, bus-num %d.\n", bus->name, dev_seq(bus));
return 0;
}
if (ret)
return ret;
- debug("SPI bus %s %d at %p\n", dev->name, dev->seq, priv->base);
+ debug("SPI bus %s %d at %p\n", dev->name, dev_seq(dev), priv->base);
return 0;
}
slave_plat = dev_get_parent_plat(slave);
debug("spi_xfer: bus:%i cs:%i flags:%lx\n",
- bus->seq, slave_plat->cs, flags);
+ dev_seq(bus), slave_plat->cs, flags);
debug("msg tx %p, rx %p submitted of %d byte(s)\n",
tx_buf, rx_buf, len);
fdt_size_t size;
int ret;
- debug("%s: %d, bus: %i\n", __func__, __LINE__, bus->seq);
+ debug("%s: %d, bus: %i\n", __func__, __LINE__, dev_seq(bus));
addr = fdtdec_get_addr_size(gd->fdt_blob, node, "reg", &size);
if (addr == FDT_ADDR_T_NONE)
return -EINVAL;
return -EINVAL;
}
- busnum = bus->seq;
+ busnum = dev_seq(bus);
cs = spi_chip_select(slave);
if (busnum >= CONFIG_SANDBOX_SPI_MAX_BUS ||
cs >= CONFIG_SANDBOX_SPI_MAX_CS) {
int ret;
debug("%s: slave %u:%u dout %p din %p bitlen %u\n",
- __func__, bus->seq, spi_chip_select(dev), dout, din, bitlen);
+ __func__, dev_seq(bus), spi_chip_select(dev), dout, din, bitlen);
if (bitlen % 8)
return -1;
num_bytes = bitlen / 8;
int ret;
debug("%s: slave %u:%u dout %p din %p bitlen %u\n",
- __func__, bus->seq, spi_chip_select(dev), dout, din, bitlen);
+ __func__, dev_seq(bus), spi_chip_select(dev), dout, din, bitlen);
if (bitlen % 8)
return -1;
num_bytes = bitlen / 8;
int ret;
debug("%s: slave %u:%u dout %p din %p bitlen %u\n",
- __func__, bus->seq, spi_chip_select(dev), dout, din, bitlen);
+ __func__, dev_seq(bus), spi_chip_select(dev), dout, din, bitlen);
if (bitlen % 8)
return -1;
num_bytes = bitlen / 8;
int num_bytes, tm, ret;
debug("%s: slave %u:%u dout %p din %p bitlen %u\n",
- __func__, bus->seq, spi_chip_select(dev), dout, din, bitlen);
+ __func__, dev_seq(bus), spi_chip_select(dev), dout, din, bitlen);
if (bitlen % 8)
return -1;
num_bytes = bitlen / 8;
int ret;
debug("spi_xfer: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n",
- bus->seq, slave_plat->cs, bitlen, bytes, flags);
+ dev_seq(bus), slave_plat->cs, bitlen, bytes, flags);
if (bitlen == 0)
goto done;
priv->len = bitlen / 8;
debug("zynq_qspi_xfer: bus:%i cs:%i bitlen:%i len:%i flags:%lx\n",
- bus->seq, slave_plat->cs, bitlen, priv->len, flags);
+ dev_seq(bus), slave_plat->cs, bitlen, priv->len, flags);
/*
* Festering sore.
u32 ts, status;
debug("spi_xfer: bus:%i cs:%i bitlen:%i len:%i flags:%lx\n",
- bus->seq, slave_plat->cs, bitlen, len, flags);
+ dev_seq(bus), slave_plat->cs, bitlen, len, flags);
if (bitlen % 8) {
debug("spi_xfer: Non byte aligned SPI transfer\n");
struct max3420_udc *udc = dev_get_priv(dev);
struct dm_spi_slave_plat *slave_pdata;
struct udevice *bus = dev->parent;
- int busnum = bus->seq;
+ int busnum = dev_seq(bus);
unsigned int cs;
uint speed, mode;
struct udevice *spid;
mdelay(1);
priv->ehci = ehci;
- priv->portnr = dev->seq;
+ priv->portnr = dev_seq(dev);
priv->init_type = type;
ret = device_get_supply_regulator(dev, "vbus-supply",
}
priv->ehci = ehci;
- priv->portnr = dev->seq;
+ priv->portnr = dev_seq(dev);
priv->init_type = type;
#if CONFIG_IS_ENABLED(DM_REGULATOR)
struct ehci_hcor *hcor;
priv->ehci = dev_read_addr_ptr(dev);
- priv->portnr = dev->seq;
+ priv->portnr = dev_seq(dev);
priv->init_type = plat->init_type;
hccr = (struct ehci_hccr *)&priv->ehci->hccapbase;
int node = dev_of_offset(dev);
const char *mode;
- priv->portnr = dev->seq;
+ priv->portnr = dev_seq(dev);
priv->ehci = dev_read_addr_ptr(dev);
mode = fdt_getprop(dt_blob, node, "dr_mode", NULL);
type = (pipe & USB_PIPE_TYPE_MASK) >> USB_PIPE_TYPE_SHIFT;
debug("0 0 S %c%c:%d:%03ld:%ld", types[type],
pipe & USB_DIR_IN ? 'i' : 'o',
- bus->seq,
+ dev_seq(bus),
(pipe & USB_PIPE_DEV_MASK) >> USB_PIPE_DEV_SHIFT,
(pipe & USB_PIPE_EP_MASK) >> USB_PIPE_EP_SHIFT);
if (setup) {
return ret;
ret = usb_find_and_bind_driver(parent, &udev->descriptor,
iface,
- udev->controller_dev->seq,
+ dev_seq(udev->controller_dev),
udev->devnum, port, &dev);
if (ret)
return ret;
if (!priv->tab_width_frac)
priv->tab_width_frac = VID_TO_POS(priv->x_charsize) * 8;
- if (dev->seq) {
+ if (dev_seq(dev)) {
snprintf(sdev->name, sizeof(sdev->name), "vidconsole%d",
- dev->seq);
+ dev_seq(dev));
} else {
strcpy(sdev->name, "vidconsole");
}
}
snprintf(dev_name, sizeof(dev_name), "%s#%d",
- virtio_drv_name[uc_priv->device], udev->seq);
+ virtio_drv_name[uc_priv->device], dev_seq(udev));
str = strdup(dev_name);
if (!str)
return -ENOMEM;
static int ast_wdt_probe(struct udevice *dev)
{
- debug("%s() wdt%u\n", __func__, dev->seq);
+ debug("%s() wdt%u\n", __func__, dev_seq(dev));
ast_wdt_stop(dev);
return 0;
if (!priv->regs)
return -EINVAL;
- debug("%s: Probing wdt%u\n", __func__, dev->seq);
+ debug("%s: Probing wdt%u\n", __func__, dev_seq(dev));
return 0;
}
*/
static int cdns_wdt_probe(struct udevice *dev)
{
- debug("%s: Probing wdt%u\n", __func__, dev->seq);
+ debug("%s: Probing wdt%u\n", __func__, dev_seq(dev));
return 0;
}
return -EINVAL;
priv->wdt_trgr_pattern = 0x1234;
- debug("%s: Probing wdt%u\n", __func__, dev->seq);
+ debug("%s: Probing wdt%u\n", __func__, dev_seq(dev));
return 0;
}
struct orion_wdt_priv *priv = dev_get_priv(dev);
int ret;
- debug("%s: Probing wdt%u\n", __func__, dev->seq);
+ debug("%s: Probing wdt%u\n", __func__, dev_seq(dev));
orion_wdt_stop(dev);
ret = clk_get_by_name(dev, "fixed", &priv->clk);
static int sbsa_gwdt_probe(struct udevice *dev)
{
- debug("%s: Probing wdt%u (sbsa-gwdt)\n", __func__, dev->seq);
+ debug("%s: Probing wdt%u (sbsa-gwdt)\n", __func__, dev_seq(dev));
return 0;
}
static int sp805_wdt_probe(struct udevice *dev)
{
- debug("%s: Probing wdt%u (sp805-wdt)\n", __func__, dev->seq);
+ debug("%s: Probing wdt%u (sp805-wdt)\n", __func__, dev_seq(dev));
return 0;
}
static int tangier_wdt_probe(struct udevice *dev)
{
- debug("%s: Probing wdt%u\n", __func__, dev->seq);
+ debug("%s: Probing wdt%u\n", __func__, dev_seq(dev));
return 0;
}
static int xlnx_wdt_probe(struct udevice *dev)
{
- debug("%s: Probing wdt%u\n", __func__, dev->seq);
+ debug("%s: Probing wdt%u\n", __func__, dev_seq(dev));
return 0;
}
struct xlnx_wwdt_plat *plat = dev_get_plat(dev);
struct xlnx_wwdt_priv *wdt = dev_get_priv(dev);
- dev_dbg(dev, "%s: Probing wdt%u\n", __func__, dev->seq);
+ dev_dbg(dev, "%s: Probing wdt%u\n", __func__, dev_seq(dev));
ret = regmap_init_mem(dev_ofnode(dev), &wdt->regs);
if (ret) {
return ofnode_valid(dev->node);
}
+static inline int dev_seq(const struct udevice *dev)
+{
+ return dev->seq;
+}
+
/**
* struct udevice_id - Lists the compatible strings supported by a driver
* @compatible: Compatible string
* PCI buses must support reading and writing configuration values
* so that the bus can be scanned and its devices configured.
*
- * Normally PCI_BUS(@bdf) is the same as @bus->seq, but not always.
+ * Normally PCI_BUS(@bdf) is the same as @dev_seq(bus), but not always.
* If bridges exist it is possible to use the top-level bus to
* access a sub-bus. In that case @bus will be the top-level bus
* and PCI_BUS(bdf) will be a different (higher) value
* claimed.
* @bus: ID of the bus that the slave is attached to. For
* driver model this is the sequence number of the SPI
- * bus (bus->seq) so does not need to be stored
+ * bus (dev_seq(bus)) so does not need to be stored
* @cs: ID of the chip select connected to the slave.
* @mode: SPI mode to use for this slave (see SPI mode flags)
* @wordlen: Size of SPI word in number of bits
DEVICE_PATH_SUB_TYPE_MSG_SD :
DEVICE_PATH_SUB_TYPE_MSG_MMC;
sddp->dp.length = sizeof(*sddp);
- sddp->slot_number = dev->seq;
+ sddp->slot_number = dev_seq(dev);
return &sddp[1];
}
#endif
DEVICE_PATH_SUB_TYPE_MSG_SD :
DEVICE_PATH_SUB_TYPE_MSG_MMC;
sddp->dp.length = sizeof(*sddp);
- sddp->slot_number = dev->seq;
+ sddp->slot_number = dev_seq(dev);
return &sddp[1];
}
continue;
/* Check for the name or the sequence number to match */
if (strcmp(it->name, devname) == 0 ||
- (endp > startp && it->seq == seq))
+ (endp > startp && dev_seq(it) == seq))
return it;
}
int eth_get_dev_index(void)
{
if (eth_get_dev())
- return eth_get_dev()->seq;
+ return dev_seq(eth_get_dev());
return -1;
}
return -EINVAL;
/* seq is valid since the device is active */
- if (eth_get_ops(dev)->write_hwaddr && !eth_mac_skip(dev->seq)) {
+ if (eth_get_ops(dev)->write_hwaddr && !eth_mac_skip(dev_seq(dev))) {
pdata = dev->plat;
if (!is_valid_ethaddr(pdata->enetaddr)) {
printf("\nError: %s address %pM illegal value\n",
bootstage_mark(BOOTSTAGE_ID_NET_ETH_INIT);
do {
- if (dev->seq != -1) {
+ if (dev_seq(dev) != -1) {
if (num_devices)
printf(", ");
- printf("eth%d: %s", dev->seq, dev->name);
+ printf("eth%d: %s", dev_seq(dev), dev->name);
if (ethprime && dev == prime_dev)
printf(" [PRIME]");
eth_write_hwaddr(dev);
- if (dev->seq != -1)
+ if (dev_seq(dev) != -1)
num_devices++;
uclass_next_device_check(&dev);
} while (dev);
eth_get_ops(dev)->read_rom_hwaddr(dev);
}
- eth_env_get_enetaddr_by_index("eth", dev->seq, env_enetaddr);
+ eth_env_get_enetaddr_by_index("eth", dev_seq(dev), env_enetaddr);
if (!is_zero_ethaddr(env_enetaddr)) {
if (!is_zero_ethaddr(pdata->enetaddr) &&
memcmp(pdata->enetaddr, env_enetaddr, ARP_HLEN)) {
/* Override the ROM MAC address */
memcpy(pdata->enetaddr, env_enetaddr, ARP_HLEN);
} else if (is_valid_ethaddr(pdata->enetaddr)) {
- eth_env_set_enetaddr_by_index("eth", dev->seq, pdata->enetaddr);
+ eth_env_set_enetaddr_by_index("eth", dev_seq(dev),
+ pdata->enetaddr);
} else if (is_zero_ethaddr(pdata->enetaddr) ||
!is_valid_ethaddr(pdata->enetaddr)) {
#ifdef CONFIG_NET_RANDOM_ETHADDR
net_random_ethaddr(pdata->enetaddr);
printf("\nWarning: %s (eth%d) using random MAC address - %pM\n",
- dev->name, dev->seq, pdata->enetaddr);
+ dev->name, dev_seq(dev), pdata->enetaddr);
#else
printf("\nError: %s address not set.\n",
dev->name);
projects / u-boot.git / commitdiff
