This patch adds support for optional platform specific reset logic in
the dwc_eth_qos driver. This new function 'eqos_fix_soc_reset' is called
after the EQOS_DMA_MODE_SWR is set and before the driver waits for this
bit to clear.
Signed-off-by: Erik Schumacher <erik.schumacher@iris-sensing.com>
*/
setbits_le32(&eqos->dma_regs->mode, EQOS_DMA_MODE_SWR);
+ if (eqos->config->ops->eqos_fix_soc_reset)
+ eqos->config->ops->eqos_fix_soc_reset(dev);
+
ret = wait_for_bit_le32(&eqos->dma_regs->mode,
EQOS_DMA_MODE_SWR, false,
eqos->config->swr_wait, false);
int (*eqos_set_tx_clk_speed)(struct udevice *dev);
int (*eqos_get_enetaddr)(struct udevice *dev);
ulong (*eqos_get_tick_clk_rate)(struct udevice *dev);
+ void (*eqos_fix_soc_reset)(struct udevice *dev);
};
struct eqos_priv {