rockchip: io-domain: Add support for RK3308

Port the RK3308 part of the Rockchip IO Domain driver from linux.

This differs from linux version in that vccio3 iodomain bit is enabled
in the write ops instead of in an init ops as in linux, this way we can
avoid keeping a full state of all supply that have been configured.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
index 2d7e9711015271202eb10a0c39fa414a14cff23f..e77189eef6cf806bd8aac321a800dbecfb651da2 100644 (file)
--- a/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/syscon_rk3308.c
@@ -16,4 +16,7 @@ U_BOOT_DRIVER(syscon_rk3308) = {
        .name = "rk3308_syscon",
        .id = UCLASS_SYSCON,
        .of_match = rk3308_syscon_ids,
+#if CONFIG_IS_ENABLED(OF_REAL)
+       .bind = dm_scan_fdt_dev,
+#endif
 };

diff --git a/drivers/misc/rockchip-io-domain.c b/drivers/misc/rockchip-io-domain.c
index cf4f7c3984c77787f4e65fa4d6d4c717433c7dce..025b6049a9f75696424909048b16f297f12fa048 100644 (file)
--- a/drivers/misc/rockchip-io-domain.c
+++ b/drivers/misc/rockchip-io-domain.c
@@ -31,6 +31,10 @@
 #define PX30_IO_VSEL_VCCIO6_SRC                BIT(0)
 #define PX30_IO_VSEL_VCCIO6_SUPPLY_NUM 1
 
+#define RK3308_SOC_CON0                        0x300
+#define RK3308_SOC_CON0_VCCIO3         BIT(8)
+#define RK3308_SOC_VCCIO3_SUPPLY_NUM   3
+
 #define RK3328_SOC_CON4                        0x410
 #define RK3328_SOC_CON4_VCCIO2         BIT(7)
 #define RK3328_SOC_VCCIO2_SUPPLY_NUM   1
@@ -119,6 +123,22 @@ static int px30_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
        return ret;
 }
 
+static int rk3308_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
+{
+       int ret = rockchip_iodomain_write(grf, offset, idx, uV);
+
+       if (!ret && idx == RK3308_SOC_VCCIO3_SUPPLY_NUM) {
+               /*
+                * set vccio3 iodomain to also use this framework
+                * instead of a special gpio.
+                */
+               u32 val = RK3308_SOC_CON0_VCCIO3 | (RK3308_SOC_CON0_VCCIO3 << 16);
+               ret = regmap_write(grf, RK3308_SOC_CON0, val);
+       }
+
+       return ret;
+}
+
 static int rk3328_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
 {
        int ret = rockchip_iodomain_write(grf, offset, idx, uV);
@@ -189,6 +209,19 @@ static const struct rockchip_iodomain_soc_data soc_data_px30_pmu = {
        .write = rockchip_iodomain_write,
 };
 
+static const struct rockchip_iodomain_soc_data soc_data_rk3308 = {
+       .grf_offset = 0x300,
+       .supply_names = {
+               "vccio0-supply",
+               "vccio1-supply",
+               "vccio2-supply",
+               "vccio3-supply",
+               "vccio4-supply",
+               "vccio5-supply",
+       },
+       .write = rk3308_iodomain_write,
+};
+
 static const struct rockchip_iodomain_soc_data soc_data_rk3328 = {
        .grf_offset = 0x410,
        .supply_names = {
@@ -256,6 +289,10 @@ static const struct udevice_id rockchip_iodomain_ids[] = {
                .compatible = "rockchip,px30-pmu-io-voltage-domain",
                .data = (ulong)&soc_data_px30_pmu,
        },
+       {
+               .compatible = "rockchip,rk3308-io-voltage-domain",
+               .data = (ulong)&soc_data_rk3308,
+       },
        {
                .compatible = "rockchip,rk3328-io-voltage-domain",
                .data = (ulong)&soc_data_rk3328,