]> git.dujemihanovic.xyz Git - u-boot.git/commit
riscv: dts: jh7110: Enable PLL node in SPL
authorBo Gan <ganboing@gmail.com>
Wed, 6 Mar 2024 03:00:11 +0000 (19:00 -0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Tue, 12 Mar 2024 06:36:13 +0000 (14:36 +0800)
commite6b7aeef3df206b9f2a47e715d643b735d18ae73
tree64208fb838045f841c787f24d5cb867c273d2310
parent0d95add3b1c7e17d979021505fcc138f74d95b88
riscv: dts: jh7110: Enable PLL node in SPL

Previously PLL node was missing from SPL dts. This caused BUS_ROOT
to stay on OSC clock (24Mhz). As a result, all peripherals have to
run at a much lower frequency, and loading from sdcard/emmc is slow.
Thus, enabling PLL node in dts to fix this.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/dts/jh7110-u-boot.dtsi