]> git.dujemihanovic.xyz Git - u-boot.git/commit
riscv: cache: Add CBO instructions
authorMayuresh Chitale <mchitale@ventanamicro.com>
Fri, 23 Aug 2024 09:41:26 +0000 (09:41 +0000)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Mon, 28 Oct 2024 10:56:54 +0000 (18:56 +0800)
commit9e859849e2caa17d730bc4507fd6ef3c7959d3b4
tree6b8fd72381d41b2d8af7fef322ce912b1af6138d
parentbfc8ca3f7f6a4977bce1403322b2b60e0975155c
riscv: cache: Add CBO instructions

Define CBO inval and flush instructions and use those for the
dcache inval and flush operations respectively.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/Kconfig
arch/riscv/lib/cache.c