]> git.dujemihanovic.xyz Git - u-boot.git/commit
riscv: sifive: fu740: reduce DDR speed from 1866MT/s to 1600MT/s
authorThomas Perrot <thomas.perrot@bootlin.com>
Thu, 22 Feb 2024 14:52:03 +0000 (15:52 +0100)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Tue, 12 Mar 2024 06:36:13 +0000 (14:36 +0800)
commit7480282eca70c737d123b076a80395dd3bdd9818
tree71ba15f6f18347ceee2e198357227efc4bd31dde
parente3a904a6906870fb472dafbf3e2c99449653b304
riscv: sifive: fu740: reduce DDR speed from 1866MT/s to 1600MT/s

It appears that there is some timing marginality either in the
board layout or the SoC that results in occasional data corruption
on some boards.
We observed this issue on some of the new HiFive Unmatched RevB
boards during volume production as well as some of the original
HiFive Unmatched boards from 2021 in our possession. This means
that there are other boards out there that might have the issue
too.

We have done some limited testing with DDR4 at 1600MT/s and
faulty boards (failing at 1866MT/s) passed.
We plan further testing after we procure a temperature chamber.

Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/dts/fu740-c000-u-boot.dtsi