From f7fead89141e72558dd24bb7ac47aabb77fc4662 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Fri, 16 Feb 2024 17:35:35 +0100 Subject: [PATCH] clk: sifive: append missing \n to messages If multiple messages are written, line-feeds improve the readability. Fixes: c40b6df87fc0 ("clk: Add SiFive FU540 PRCI clock driver") Signed-off-by: Heinrich Schuchardt Reviewed-by: Sean Anderson --- drivers/clk/analogbits/wrpll-cln28hpc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/analogbits/wrpll-cln28hpc.c b/drivers/clk/analogbits/wrpll-cln28hpc.c index a3cb109d35..537c696b72 100644 --- a/drivers/clk/analogbits/wrpll-cln28hpc.c +++ b/drivers/clk/analogbits/wrpll-cln28hpc.c @@ -81,7 +81,7 @@ static int __wrpll_calc_filter_range(unsigned long post_divr_freq) { if (post_divr_freq < MIN_POST_DIVR_FREQ || post_divr_freq > MAX_POST_DIVR_FREQ) { - WARN(1, "%s: post-divider reference freq out of range: %lu", + WARN(1, "%s: post-divider reference freq out of range: %lu\n", __func__, post_divr_freq); return -ERANGE; } @@ -229,7 +229,7 @@ int wrpll_configure_for_rate(struct wrpll_cfg *c, u32 target_rate, int range; if (c->flags == 0) { - WARN(1, "%s called with uninitialized PLL config", __func__); + WARN(1, "%s called with uninitialized PLL config\n", __func__); return -EINVAL; } @@ -335,7 +335,7 @@ unsigned long wrpll_calc_output_rate(const struct wrpll_cfg *c, u64 n; if (c->flags & WRPLL_FLAGS_EXT_FEEDBACK_MASK) { - WARN(1, "external feedback mode not yet supported"); + WARN(1, "external feedback mode not yet supported\n"); return ULONG_MAX; } -- 2.39.5