From b8e5c7f94af6b178946ae01ba36ac7fac1e86ec7 Mon Sep 17 00:00:00 2001 From: Xiubo Li <Li.Xiubo@freescale.com> Date: Fri, 21 Nov 2014 17:40:54 +0800 Subject: [PATCH] ARM: HYP/non-sec: add the pen address BE mode support. For some SoCs, the pen address register maybe in BE mode and the CPUs are in LE mode. This patch adds BE mode support for smp pen address. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> --- arch/arm/cpu/armv7/nonsec_virt.S | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 745670e549..1ab5d54e30 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -191,6 +191,9 @@ ENTRY(smp_waitloop) wfi ldr r1, =CONFIG_SMP_PEN_ADDR @ load start address ldr r1, [r1] +#ifdef CONFIG_PEN_ADDR_BIG_ENDIAN + rev r1, r1 +#endif cmp r0, r1 @ make sure we dont execute this code beq smp_waitloop @ again (due to a spurious wakeup) mov r0, r1 -- 2.39.5