From 913a39e9aa4d935948d41cd727d53f5878414a77 Mon Sep 17 00:00:00 2001 From: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com> Date: Sat, 3 Sep 2011 22:12:56 -0400 Subject: [PATCH] dm6446: disable cache usage due to coherency issues there are cache coherency issues when using the DAVINCI Ethernet driver, hence caches cant be used for dm6446 u-boot. As per new cache management framework,if the caches are not used in u-boot, it needs to be explicitly indicated through macros in config file. CACHE disable is indicated by the following macro definitions in config file, 1. CONFIG_SYS_ICACHE_OFF 2. CONFIG_SYS_DCACHE_OFF 3. CONFIG_SYS_L2CACHE_OFF Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> --- include/configs/davinci_dvevm.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index 45214fa42a..086a2d7d40 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -60,6 +60,9 @@ #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CONFIG_SYS_HZ 1000 #define CONFIG_SOC_DM644X +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_SYS_L2CACHE_OFF /*====================================================*/ /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ -- 2.39.5