From 7237c033b02fe295880435f1eb80819a0c987532 Mon Sep 17 00:00:00 2001
From: Jon Loeliger <jdl@freescale.com>
Date: Thu, 19 Oct 2006 11:02:16 -0500
Subject: [PATCH] Moved i2c driver out of cpu/mpc86xx/i2c.c into
 drivers/fsl_i2c.c

in an effort to begin to unify the umpteen FSL I2C drivers that
are all otherwise very similar.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
---
 cpu/mpc86xx/Makefile                   |   2 +-
 drivers/Makefile                       |   3 +-
 cpu/mpc86xx/i2c.c => drivers/fsl_i2c.c | 118 ++++++++++---------------
 include/asm-ppc/fsl_i2c.h              |  90 +++++++++++++++++++
 include/configs/MPC8641HPCN.h          |   1 +
 5 files changed, 142 insertions(+), 72 deletions(-)
 rename cpu/mpc86xx/i2c.c => drivers/fsl_i2c.c (56%)
 create mode 100644 include/asm-ppc/fsl_i2c.h

diff --git a/cpu/mpc86xx/Makefile b/cpu/mpc86xx/Makefile
index ad5b36deff..de5561e923 100644
--- a/cpu/mpc86xx/Makefile
+++ b/cpu/mpc86xx/Makefile
@@ -30,7 +30,7 @@ LIB	= $(obj)lib$(CPU).a
 START	= start.o #resetvec.o
 SOBJS	= cache.o
 COBJS	= traps.o cpu.o cpu_init.o speed.o interrupts.o \
-	  pci.o pcie_indirect.o i2c.o spd_sdram.o
+	  pci.o pcie_indirect.o spd_sdram.o
 
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/drivers/Makefile b/drivers/Makefile
index 0f84969a99..b191018c72 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -50,7 +50,8 @@ COBJS	= 3c589.o 5701rls.o ali512x.o \
 	  videomodes.o w83c553f.o \
 	  ks8695eth.o \
 	  pxa_pcmcia.o mpc8xx_pcmcia.o tqm8xx_pcmcia.o	\
-	  rpx_pcmcia.o
+	  rpx_pcmcia.o \
+	  fsl_i2c.o
 
 SRCS	:= $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/cpu/mpc86xx/i2c.c b/drivers/fsl_i2c.c
similarity index 56%
rename from cpu/mpc86xx/i2c.c
rename to drivers/fsl_i2c.c
index d99ecb92d4..72b2556b28 100644
--- a/cpu/mpc86xx/i2c.c
+++ b/drivers/fsl_i2c.c
@@ -1,23 +1,9 @@
 /*
- * (C) Copyright 2003,Motorola Inc.
- * Xianghua Xiao <x.xiao@motorola.com>
- * Adapted for Motorola 85xx chip.
- *
- * (C) Copyright 2003
- * Gleb Natapov <gnatapov@mrv.com>
- * Some bits are taken from linux driver writen by adrian@humboldt.co.uk
- *
- * Modified for MPC86xx by Jeff Brown
- *
- * Hardware I2C driver for MPC107 PCI bridge.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
+ * Copyright 2006 Freescale Semiconductor, Inc.
  *
  * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -30,56 +16,49 @@
  * MA 02111-1307 USA
  */
 
+
 #include <common.h>
 #include <command.h>
-#include <asm/io.h>
 
 #ifdef CONFIG_HARD_I2C
-#include <i2c.h>
 
-#define TIMEOUT (CFG_HZ/4)
+#include <asm/io.h>
+#include <asm/fsl_i2c.h>
 
-#define I2C_Addr ((u8 *)(CFG_CCSRBAR + 0x3100))
+#define I2C_TIMEOUT	(CFG_HZ / 4)
 
-#define I2CADR  &I2C_Addr[0]
-#define I2CFDR  &I2C_Addr[4]
-#define I2CCCR  &I2C_Addr[8]
-#define I2CCSR  &I2C_Addr[12]
-#define I2CCDR  &I2C_Addr[16]
-#define I2CDFSRR &I2C_Addr[20]
+#define I2C	((struct fsl_i2c *)(CFG_IMMR + CFG_I2C_OFFSET))
 
-#define I2C_READ  1
-#define I2C_WRITE 0
 
 void
 i2c_init(int speed, int slaveadd)
 {
 	/* stop I2C controller */
-	writeb(0x0, I2CCCR);
+	writeb(0x0 , &I2C->cr);
 
 	/* set clock */
-	writeb(0x3f, I2CFDR);
+	writeb(0x3f, &I2C->fdr);
 
 	/* set default filter */
-	writeb(0x10, I2CDFSRR);
+	writeb(0x10, &I2C->dfsrr);
 
 	/* write slave address */
-	writeb(slaveadd, I2CADR);
+	writeb(slaveadd, &I2C->adr);
 
 	/* clear status register */
-	writeb(0x0, I2CCSR);
+	writeb(0x0, &I2C->sr);
 
 	/* start I2C controller */
-	writeb(MPC86xx_I2CCR_MEN, I2CCCR);
+	writeb(I2C_CR_MEN, &I2C->cr);
 }
 
 static __inline__ int
 i2c_wait4bus(void)
 {
-	ulong timeval = get_timer(0);
+	ulong timeval = get_timer (0);
 
-	while (readb(I2CCSR) & MPC86xx_I2CSR_MBB) {
-		if (get_timer(timeval) > TIMEOUT) {
+	while (readb(&I2C->sr) & I2C_SR_MBB) {
+		if (get_timer(timeval) > I2C_TIMEOUT) {
 			return -1;
 		}
 	}
@@ -94,42 +73,42 @@ i2c_wait(int write)
 	ulong timeval = get_timer(0);
 
 	do {
-		csr = readb(I2CCSR);
-		if (!(csr & MPC86xx_I2CSR_MIF))
+		csr = readb(&I2C->sr);
+		if (!(csr & I2C_SR_MIF))
 			continue;
 
-		writeb(0x0, I2CCSR);
+		writeb(0x0, &I2C->sr);
 
-		if (csr & MPC86xx_I2CSR_MAL) {
+		if (csr & I2C_SR_MAL) {
 			debug("i2c_wait: MAL\n");
 			return -1;
 		}
 
-		if (!(csr & MPC86xx_I2CSR_MCF)) {
+		if (!(csr & I2C_SR_MCF))	{
 			debug("i2c_wait: unfinished\n");
 			return -1;
 		}
 
-		if (write == I2C_WRITE && (csr & MPC86xx_I2CSR_RXAK)) {
+		if (write == I2C_WRITE && (csr & I2C_SR_RXAK)) {
 			debug("i2c_wait: No RXACK\n");
 			return -1;
 		}
 
 		return 0;
-	} while (get_timer(timeval) < TIMEOUT);
+	} while (get_timer (timeval) < I2C_TIMEOUT);
 
 	debug("i2c_wait: timed out\n");
 	return -1;
 }
 
 static __inline__ int
-i2c_write_addr(u8 dev, u8 dir, int rsta)
+i2c_write_addr (u8 dev, u8 dir, int rsta)
 {
-	writeb(MPC86xx_I2CCR_MEN | MPC86xx_I2CCR_MSTA | MPC86xx_I2CCR_MTX
-	       | (rsta ? MPC86xx_I2CCR_RSTA : 0),
-	       I2CCCR);
+	writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX
+	       | (rsta ? I2C_CR_RSTA : 0),
+	       &I2C->cr);
 
-	writeb((dev << 1) | dir, I2CCDR);
+	writeb((dev << 1) | dir, &I2C->dr);
 
 	if (i2c_wait(I2C_WRITE) < 0)
 		return 0;
@@ -142,11 +121,11 @@ __i2c_write(u8 *data, int length)
 {
 	int i;
 
-	writeb(MPC86xx_I2CCR_MEN | MPC86xx_I2CCR_MSTA | MPC86xx_I2CCR_MTX,
-	       I2CCCR);
+	writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX,
+	       &I2C->cr);
 
 	for (i = 0; i < length; i++) {
-		writeb(data[i], I2CCDR);
+		writeb(data[i], &I2C->dr);
 
 		if (i2c_wait(I2C_WRITE) < 0)
 			break;
@@ -160,12 +139,11 @@ __i2c_read(u8 *data, int length)
 {
 	int i;
 
-	writeb(MPC86xx_I2CCR_MEN | MPC86xx_I2CCR_MSTA
-	       | ((length == 1) ? MPC86xx_I2CCR_TXAK : 0),
-	       I2CCCR);
+	writeb(I2C_CR_MEN | I2C_CR_MSTA | ((length == 1) ? I2C_CR_TXAK : 0),
+	       &I2C->cr);
 
 	/* dummy read */
-	readb(I2CCDR);
+	readb(&I2C->dr);
 
 	for (i = 0; i < length; i++) {
 		if (i2c_wait(I2C_READ) < 0)
@@ -173,14 +151,14 @@ __i2c_read(u8 *data, int length)
 
 		/* Generate ack on last next to last byte */
 		if (i == length - 2)
-			writeb(MPC86xx_I2CCR_MEN | MPC86xx_I2CCR_MSTA
-			       | MPC86xx_I2CCR_TXAK, I2CCCR);
+			writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_TXAK,
+			       &I2C->cr);
 
 		/* Generate stop on last byte */
 		if (i == length - 1)
-			writeb(MPC86xx_I2CCR_MEN | MPC86xx_I2CCR_TXAK, I2CCCR);
+			writeb(I2C_CR_MEN | I2C_CR_TXAK, &I2C->cr);
 
-		data[i] = readb(I2CCDR);
+		data[i] = readb(&I2C->dr);
 	}
 
 	return i;
@@ -190,9 +168,9 @@ int
 i2c_read(u8 dev, uint addr, int alen, u8 *data, int length)
 {
 	int i = 0;
-	u8 *a = (u8 *) &addr;
+	u8 *a = (u8*)&addr;
 
-	if (i2c_wait4bus() < 0)
+	if (i2c_wait4bus () < 0)
 		goto exit;
 
 	if (i2c_write_addr(dev, I2C_WRITE, 0) == 0)
@@ -206,8 +184,8 @@ i2c_read(u8 dev, uint addr, int alen, u8 *data, int length)
 
 	i = __i2c_read(data, length);
 
-exit:
-	writeb(MPC86xx_I2CCR_MEN, I2CCCR);
+ exit:
+	writeb(I2C_CR_MEN, &I2C->cr);
 
 	return !(i == length);
 }
@@ -216,7 +194,7 @@ int
 i2c_write(u8 dev, uint addr, int alen, u8 *data, int length)
 {
 	int i = 0;
-	u8 *a = (u8 *) &addr;
+	u8 *a = (u8*)&addr;
 
 	if (i2c_wait4bus() < 0)
 		goto exit;
@@ -229,8 +207,8 @@ i2c_write(u8 dev, uint addr, int alen, u8 *data, int length)
 
 	i = __i2c_write(data, length);
 
-exit:
-	writeb(MPC86xx_I2CCR_MEN, I2CCCR);
+ exit:
+	writeb(I2C_CR_MEN, &I2C->cr);
 
 	return !(i == length);
 }
@@ -247,13 +225,13 @@ i2c_probe(uchar chip)
 	 */
 	udelay(10000);
 
-	return i2c_read(chip, 0, 1, (char *)&tmp, 1);
+	return i2c_read(chip, 0, 1, (uchar *)&tmp, 1);
 }
 
 uchar
 i2c_reg_read(uchar i2c_addr, uchar reg)
 {
-	char buf[1];
+	uchar buf[1];
 
 	i2c_read(i2c_addr, reg, 1, buf, 1);
 
diff --git a/include/asm-ppc/fsl_i2c.h b/include/asm-ppc/fsl_i2c.h
new file mode 100644
index 0000000000..76b1c4309b
--- /dev/null
+++ b/include/asm-ppc/fsl_i2c.h
@@ -0,0 +1,90 @@
+/*
+ * Freescale I2C Controller
+ *
+ * Copyright 2006 Freescale Semiconductor, Inc.
+ *
+ * Based on earlier versions by Gleb Natapov <gnatapov@mrv.com>,
+ * Xianghua Xiao <x.xiao@motorola.com>, Eran Liberty (liberty@freescale.com),
+ * and Jeff Brown.
+ * Some bits are taken from linux driver writen by adrian@humboldt.co.uk.
+ *
+ * This software may be used and distributed according to the
+ * terms of the GNU Public License, Version 2, incorporated
+ * herein by reference.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ASM_FSL_I2C_H_
+#define _ASM_FSL_I2C_H_
+
+#include <asm/types.h>
+
+typedef struct fsl_i2c {
+
+	u8 adr;		/* I2C slave address */
+	u8 res0[3];
+#define I2C_ADR		0xFE
+#define I2C_ADR_SHIFT	1
+#define I2C_ADR_RES	~(I2C_ADR)
+
+	u8 fdr;		/* I2C frequency divider register */
+	u8 res1[3];
+#define IC2_FDR		0x3F
+#define IC2_FDR_SHIFT	0
+#define IC2_FDR_RES	~(IC2_FDR)
+
+	u8 cr;		/* I2C control redister	*/
+	u8 res2[3];
+#define I2C_CR_MEN	0x80
+#define I2C_CR_MIEN	0x40
+#define I2C_CR_MSTA	0x20
+#define I2C_CR_MTX	0x10
+#define I2C_CR_TXAK	0x08
+#define I2C_CR_RSTA	0x04
+#define I2C_CR_BCST	0x01
+
+	u8 sr;		/* I2C status register */
+	u8 res3[3];
+#define I2C_SR_MCF	0x80
+#define I2C_SR_MAAS	0x40
+#define I2C_SR_MBB	0x20
+#define I2C_SR_MAL	0x10
+#define I2C_SR_BCSTM	0x08
+#define I2C_SR_SRW	0x04
+#define I2C_SR_MIF	0x02
+#define I2C_SR_RXAK	0x01
+
+	u8 dr;		/* I2C data register */
+	u8 res4[3];
+#define I2C_DR		0xFF
+#define I2C_DR_SHIFT	0
+#define I2C_DR_RES	~(I2C_DR)
+
+	u8 dfsrr;	/* I2C digital filter sampling rate register */
+	u8 res5[3];
+#define I2C_DFSRR	0x3F
+#define I2C_DFSRR_SHIFT	0
+#define I2C_DFSRR_RES	~(I2C_DR)
+
+	/* Fill out the reserved block */
+	u8 res6[0xE8];
+} fsl_i2c_t;
+
+
+#define I2C_READ  1
+#define I2C_WRITE 0
+
+#endif	/* _ASM_I2C_H_ */
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 6e883f73f8..81bb7cf134 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -279,6 +279,7 @@
 #undef	CONFIG_SOFT_I2C			/* I2C bit-banged */
 #define CFG_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CFG_I2C_SLAVE		0x7F
+#define CFG_I2C_OFFSET		0x3100
 #define CFG_I2C_NOPROBES        {0x69}	/* Don't probe these addrs */
 
 /*
-- 
2.39.5