From 151d5d992eab8c497b24c816c73dc1ad8bffb4eb Mon Sep 17 00:00:00 2001
From: Andy Fleming <afleming@freescale.com>
Date: Mon, 23 Apr 2007 01:32:22 -0500
Subject: [PATCH] Add cpu support for the 8544
Recognize new SVR values, and add a few register definitions
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
---
cpu/mpc85xx/cpu.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 2fe4f2abba..2fe6bdf4b9 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004,2007 Freescale Semiconductor, Inc.
* (C) Copyright 2002, 2003 Motorola Inc.
* Xianghua Xiao (X.Xiao@motorola.com)
*
@@ -70,6 +70,12 @@ int checkcpu (void)
case SVR_8548_E:
puts("8548_E");
break;
+ case SVR_8544:
+ puts("8544");
+ break;
+ case SVR_8544_E:
+ puts("8544_E");
+ break;
default:
puts("Unknown");
break;
@@ -112,7 +118,7 @@ int checkcpu (void)
#endif
clkdiv = lcrr & 0x0f;
if (clkdiv == 2 || clkdiv == 4 || clkdiv == 8) {
-#ifdef CONFIG_MPC8548
+#if defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544)
/*
* Yes, the entire PQ38 family use the same
* bit-representation for twice the clock divider values.
--
2.39.5