Peng Fan [Sat, 30 May 2020 08:43:20 +0000 (16:43 +0800)]
pinctrl: imx5: move soc info to data section
The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.
Peng Fan [Sat, 30 May 2020 08:39:14 +0000 (16:39 +0800)]
pinctrl: imx8m: move soc info to data section
The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.
Peng Fan [Sat, 30 May 2020 08:37:39 +0000 (16:37 +0800)]
pinctrl: imx7: move soc info to data section
The soc info without initialization value should be put into
data section. The driver could be used before relocation,
with it in BSS section could cause issue, since BSS section
is not initializated and it might overwrite other areas that
used by others, such as dtb.
Oliver Chen [Tue, 21 Apr 2020 06:48:09 +0000 (14:48 +0800)]
drivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issue
Add logic to automatically update umctl2's setting based
on phy training CDD value for rank to rank space issue
Acked-by: Ye Li <ye.li@nxp.com> Signed-off-by: Oliver Chen <Oliver.Chen@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Jian Li [Thu, 27 Feb 2020 01:40:10 +0000 (09:40 +0800)]
imx8mp: Disables use of MR4 TUF flag (MR4[7]) bit
In uMCTL2 Databook, for LPDDR4, it is recommended to set
this register to 1. This can avoid ddr bandwidth is lower
after booting with running for a while.
Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jian Li <jian.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sherry Sun [Mon, 20 Jan 2020 03:13:14 +0000 (11:13 +0800)]
drivers: ddr: imx8mp: Add inline ECC feature support
the DRAM Controller in i.MX8MP will support a feature called "Inline ECC".
This is supported for all 3 supported DRAM technologies (LPDDR4, DDR4 and
DDR3L). When this feature is enabled by software, the DRAM Controller
reserves 12.5% of DRAM capacity for ECC information, and presents only
the non-ECC portion (lower 87.5% of the installed capacity of DRAM) to
the rest of the SoC.
The DRAM memory can be divided into 8 regions so that if a use case only
requires ECC protection on a subset of memory, then only that subset of
memory need support inline ECC. If this occurs, then there is no
performance penalty accessing the non-ECC-protected memory (no need to
access ECC for this portion of the memory map). This is all configured
with the DRAM Controller.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Jacky Bai [Mon, 10 Feb 2020 10:02:00 +0000 (18:02 +0800)]
driver: ddr: imx: correct the pwrctl setting of selfref_en on imx8m
The 'selfref_en' should be bit'0', so correct the setting to
enable the auto self-refresh.
Reviewed-by: Jian Li <jian.li@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Now that commit 3e57f879eee6 ("mtd: nand: raw: denali: Assert reset
before deassert") added the reset assertion, this code in the board
file is unneeded.
serial: uniphier: flush transmitter before changing hardware settings
Ensure the transmitter is empty when chaining the baudrate or any
hardware settings. If a character is remaining in the transmitter,
the console will be garbled.
bus: uniphier-system-bus: add UniPhier System Bus driver
Since commit 1517126fdac2 ("ARM: uniphier: select DM_ETH"), DM-based
drivers/net/smc911x.c is compiled, but it is never probed because the
parent node lacks the DM-based driver.
I need a skeleton driver to populate child devices (but the next commit
will move more hardware settings to the this driver).
I put this to drivers/bus/uniphier-system-bus.c because this is the
same path as the driver in Linux kernel.
ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN to 2MB
I increased the maximum U-Boot proper size from time to time, but
configs/uniphier_v7_defconfig hit the current limit 832KB.
Some historical info:
In the initial support, the max size was 512MB.
Commit 58d702274c09 ("ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN")
increased it to 576KB, and commit 3ce5b1a8d86d ("ARM: uniphier: move
SPL stack address") moved the SPL stack location to avoid the memory
map conflict. It was the solution to increase the size without changing
the NOR boot image map.
commit 1a4bd3a095b2 ("ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN
again") ended up with increasing the max size again, breaking the NOR
boot image map. The limit was set to 832KB, otherwise the SPL stack
would overwrite the U-Boot proper image:
CONFIG_SPL_STACK - CONFIG_SYS_UBOOT_BASE + sizeof(struct image_header) = 0xd0000
To increase CONFIG_SYS_MONITOR_LEN even more, the SPL stack must be
moved somewhere. I put it back to the original location prior to
commit 3ce5b1a8d86d.
With this change, there is no more practical size limit.
This weird workaround was the best I came up with at that time
to boot U-Boot from TF-A.
I noticed U-Boot successfully boots on LD20 (i.e. CA72 CPU) by using
the latest TF-A.
Specifically, since the following TF-A commit, U-Boot runs at EL2
instead of EL1, and this issue went away as a side-effect.
|commit f998a052fd94ea082833109f25b94ed5bfa24e8b
|Author: Masahiro Yamada <yamada.masahiro@socionext.com>
|Date: Thu Jul 25 10:57:38 2019 +0900
|
| uniphier: run BL33 at EL2
|
| All the SoCs in 64-bit UniPhier SoC family support EL2.
|
| Just hard-code MODE_EL2 instead of using el_implemented() helper.
|
| Change-Id: I7ab48002c5205bc8c013e1b46313b57d6c431db0
| Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
However, if I reverted that, this problem would come back, presumably
because some EL1 code in U-Boot triggers this issue.
Now that commit f8ddd8cbb513 ("arm64: issue ISB after updating system
registers") fixed this issue properly, this weird workaround is no
longer needed irrespective of the exception level at which U-Boot runs.
config: Enable support for the XHCI controller on RPI4 board
This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
and USB commands. To get it working one has to call the following commands:
"pci enum; usb start;", thus such commands have been added to the default
"preboot" environment variable. One has to update their environment if it
is already configured to get this feature working out of the box.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
rpi4: add a mapping for the PCIe XHCI controller MMIO registers (ARM 32bit)
Create a non-cacheable mapping for the 0x600000000 physical memory region,
where MMIO registers for the PCIe XHCI controller are instantiated by the
PCIe bridge. Due to 32bit limit in the CPU virtual address space in ARM
32bit mode, this region is mapped at 0xff800000 CPU virtual address.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Move ADDR_MAP related config options from include/configs/*.h to the
proper place in lib/Kconfig. This has been done using
./tools/moveconfig.py and manual inspection of the generated changes.
This is a preparation to use ADDR_MAP helper on ARM 32bit Raspberry Pi4
board for mapping the PCIe XHCI MMIO, which is above the 4GiB identity
mapping limit.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Some atypical users of xhci might need to manually reset their xHCI
controller before starting the HCD setup. Check if a reset controller
device is available to the PCI bus and trigger a reset.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
[mb: squash fix to only build xhci_reset_hw() if CONFIG_DM_BUS] Signed-off-by: Matthias Brugger <mbrugger@suse.com>
reset: Add Raspberry Pi 4 firmware reset controller
Raspberry Pi 4's co-processor controls some of the board's HW
initialization process, but it's up to Linux to trigger it when
relevant. Introduce a reset controller capable of interfacing with
RPi4's co-processor that models these firmware initialization routines as
reset lines.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
arm: rpi: Add function to trigger VL805's firmware load
On the Raspberry Pi 4, after a PCI reset, VL805's (a xHCI chip) firmware
may either be loaded directly from an EEPROM or, if not present, by the
SoC's VideCore (the SoC's co-processor). Introduce the function that
informs VideCore that VL805 may need its firmware loaded.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Marek Szyprowski [Mon, 25 May 2020 11:39:59 +0000 (13:39 +0200)]
configs: Enable support for the XHCI controller on RPI4 board (ARM 64-bit)
This requires enabling BRCMSTB PCIe and XHCI_PCI drivers as well as PCI
and USB commands. To get it working one has to call the following commands:
"pci enum; usb start;", thus such commands have been added to the default
"preboot" environment variable. One has to update their environment if it
is already configured to get this feature working out of the box.
pci: Add driver for Broadcom BCM2711 SoC PCIe controller
This patch adds basic driver PCI Express controller found on Broadcom
set-top-box SoCs, e.g. BCM2711.
The code is based on Linux upstream driver (pcie-brcmstb.c) with MSI
handling removed. The inbound access memory region is not currently
parsed from dma-ranges DT property and a fixed 3GB region is used.
The patch has been tested on RPI4 board, i.e. on BCM2711 SoC with VL805
USB Host Controller.
linux/bitfield.h: Add primitives for manipulating bitfields both in host- and fixed-endian
Imports Al Viro's original Linux commit 00b0c9b82663a, which contains
an in depth explanation and two fixes from Johannes Berg: e7d4a95da86e0 "bitfield: fix *_encode_bits()", 37a3862e12382 "bitfield: add u8 helpers".
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
[s.nawrocki: added empty lines between functions and macros] Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
[mb: squash fix including byteorder.h] Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Walter Lozano [Thu, 25 Jun 2020 04:10:15 +0000 (01:10 -0300)]
arm: dts: include gpio nodes for card detect
Several MMC drivers use GPIO for card detection with cd-gpios property in
the MMC node pointing to a GPIO node. However, as U-Boot tries to save
space by keeping only required nodes using u-boot* properties, several
devices tree result in having only in the MMC node but not the GPIO node
associated to cd-gpios.
This patch, fixes several ocurrence of this issue.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Walter Lozano [Thu, 25 Jun 2020 04:10:14 +0000 (01:10 -0300)]
dm: doc: update of-plat with new phandle support
Update documentation to reflect the new phandle support when OF_PLATDATA
is used. Now phandles are implemented as pointers to U_BOOT_DEVICE,
which makes it possible to get a pointer to the actual device.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Walter Lozano [Thu, 25 Jun 2020 04:10:13 +0000 (01:10 -0300)]
dtoc: extend dtoc to use struct driver_info when linking nodes
In the current implementation, when dtoc parses a dtb to generate a struct
platdata it converts the information related to linked nodes as pointers
to struct platdata of destination nodes. By doing this, it makes
difficult to get pointer to udevices created based on these
information.
This patch extends dtoc to use struct driver_info when populating
information about linked nodes, which makes it easier to later get
the devices created. In this context, reimplement functions like
clk_get_by_index_platdata() which made use of the previous approach.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Walter Lozano [Thu, 25 Jun 2020 04:10:11 +0000 (01:10 -0300)]
core: extend struct driver_info to point to device
Currently when creating an U_BOOT_DEVICE entry a struct driver_info
is declared, which contains the data needed to instantiate the device.
However, the actual device is created at runtime and there is no proper
way to get the device based on its struct driver_info.
This patch extends struct driver_info adding a pointer to udevice which
is populated during the bind process, allowing to generate a set of
functions to get the device based on its struct driver_info.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Walter Lozano [Thu, 25 Jun 2020 04:10:10 +0000 (01:10 -0300)]
core: drop const for struct driver_info
In order to prepare for a new support of phandle when OF_PLATDATA is used
drop the const for struct driver_info as this struct will need to be
updated on runtime.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Walter Lozano [Fri, 3 Jul 2020 11:07:17 +0000 (08:07 -0300)]
dtoc: add support to scan drivers
Currently dtoc scans dtbs to convert them to struct platdata and
to generate U_BOOT_DEVICE entries. These entries need to be filled
with the driver name, but at this moment the information used is the
compatible name present in the dtb. This causes that only nodes with
a compatible name that matches a driver name generate a working
entry.
In order to improve this behaviour, this patch adds to dtoc the
capability of scan drivers source code to generate a list of valid driver
names and aliases. This allows to generate U_BOOT_DEVICE entries using
valid driver names and rise a warning in the case a name is not valid.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Open files in utf-8 mode: Signed-off-by: Simon Glass <sjg@chromium.org>
Walter Lozano [Thu, 25 Jun 2020 04:10:06 +0000 (01:10 -0300)]
core: add support for U_BOOT_DRIVER_ALIAS
Currently when using OF_PLATDATA the binding between devices and drivers
is done trying to match the compatible string in the node with a driver
name. However, usually a single driver supports multiple compatible strings
which causes that only devices which its compatible string matches a
driver name get bound.
To overcome this issue, this patch adds the U_BOOT_DRIVER_ALIAS macro,
which generates no code at all, but allows an easy way to declare driver
name aliases. Thanks to this, dtoc could be improve to look for the driver
name based on its alias when it populates the U_BOOT_DEVICE entry.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Walter Lozano [Thu, 25 Jun 2020 04:10:04 +0000 (01:10 -0300)]
drivers: rename drivers to match compatible string
When using OF_PLATDATA, the bind process between devices and drivers
is performed trying to match compatible string with driver names.
However driver names are not strictly defined, and also there are different
names used when declaring a driver with U_BOOT_DRIVER, the name of the
symbol used in the linker list and the used in the struct driver_info.
In order to make things a bit more clear, rename the drivers names. This
will also help for further OF_PLATDATA improvements, such as checking
for valid driver names.
Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Add a fix for sandbox of-platdata to avoid using an invalid ANSI colour: Signed-off-by: Simon Glass <sjg@chromium.org>
When printing the device tree we want to get an output that can be used as
input for the device tree compiler. This requires that we do not write
bogus lines like
For instance the QEMU virt device has a property interrupt-map with 640
bytes which exceeds CMD_FDT_MAX_DUMP=64.
So lets do away with the artificial limitation to 64 bytes.
As indicated in commit f0a29d43313c ("fdt: Limit printed hex in fdt print
and list commands") if a device tree contains binary blobs, it may still
be desirable to limit the output length. Provide environment variable
fdt_max_dump for this purpose.
Fixes: 5d927b428622 ("Kconfig: Drop CONFIG_CMD_FDT_MAX_DUMP") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 14 Jun 2020 16:54:05 +0000 (10:54 -0600)]
patman: Add a test for the 'possible new uclass' check
It is quite likely that the number of U-Boot-specific tests in
checkpatch.pl will increase over time. We should have tests for these to
avoid undefined behaviour and bugs being introduced, which might cause
people to ignore the warnings.
Add a simple new class that can generate a patch with a single-line
addition in it. Use that to add a test for one of the checkpatch checks.
Simon Glass [Sun, 14 Jun 2020 16:54:04 +0000 (10:54 -0600)]
patman: Rename test.py to test_checkpatch.py
These tests check checkpatch.pl operation and can server as our tests for
the U-Boot-specific updates to that script. Rename the file and update
comments to indicate this.
Up to now the RAM size of the sandbox is hard coded as 128 MiB. This does
not allow testing the correct handling of addresses outside the 32bit
range. 128 MiB is also rather small when tracing functions where the trace
is written to RAM.
Provide configuration variable CONFIG_SANDBOX_RAM_SIZE_MB to set the RAM
size in MiB. It defaults to 128 MiB with a minimum of 64 MiB.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Compiling drivers/mtd/spi/sandbox.c fails when compiled with
CONFIG_LOG=n:
In file included from include/common.h:20,
from drivers/mtd/spi/sandbox.c:13:
drivers/mtd/spi/sandbox.c:295:15: error: format ‘%s’ expects argument of
type ‘char *’, but argument 7 has type ‘int’ [-Werror=format=]
295 | log_content(" cmd: transition to %s state\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
37 | #define pr_fmt(fmt) fmt
| ^~~
include/log.h:128:30: note: in expansion of macro ‘log_nop’
128 | #define log_content(_fmt...) log_nop(LOG_CATEGORY, \
| ^~~~~~~
drivers/mtd/spi/sandbox.c:295:3: note: in expansion of macro
‘log_content’
295 | log_content(" cmd: transition to %s state\n",
| ^~~~~~~~~~~
drivers/mtd/spi/sandbox.c:295:37: note: format string is defined here
295 | log_content(" cmd: transition to %s state\n",
| ~^
| |
| char *
| %d
Supply function sandbox_sf_state_name() independent of CONFIG_LOG.
Fixes: c3aed5db591e ("sandbox: spi: Add more logging") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Johannes Holland [Mon, 11 May 2020 13:22:26 +0000 (15:22 +0200)]
spi: add support for all spi modes with soft spi
The spi bitbanging driver did not implement all spi modes properly. Add
code to support all spi modes, honoring soft_spi_set_mode() and
defaulting to spi mode 0. Previously, CPHA was implemented inversely
(defaulting to CPHA=1) and CPOL=1 was hardcoded.
Signed-off-by: Johannes Holland <johannes.holland@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
projects / u-boot.git / log
![4 years agoimx8mp: Disables use of MR4 TUF flag (MR4[7]) bit](/html/static/git-favicon.png?p=u-boot.git;a=commit;h=3f63d27c177a84dd97f77fb843ff4e4c6d7d45eb){kind=link}
