Ioana Ciornei [Wed, 31 May 2023 16:04:30 +0000 (19:04 +0300)]
net: fsl-mc: sync DPBP MC APIs
Sync the Data Path Buffer Pool APIs to their latest form, this means the
layout of each command is created based on structures which clearly
describe the endianness of each field rather than some macros.
The command version is kept in place, meaning that the minimum MC
version accepted is not changed in any way.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Florin Chiculita [Wed, 31 May 2023 15:02:18 +0000 (18:02 +0300)]
board: fsl: lx2160ardb: add dts fixup function for RevC and newer
Since the new RevC LX2160A-RDB board has its 10G Aquantia PHYs at
different MDIO bus addresses, we must update both the kernel DTS and
u-boot's DTS (in case of DM_ETH) in case the board is indeed RevC or
newer. Use the newly introduced get_board_rev() function to trigger a
fixup of the kernel DTS to properly match the actual PHY addresses.
All this is encapsulated in the fdt_fixup_board_phy_revc() function
which will be used in the next patch.
Use the newly fdt_fixup_board_phy_revc() function introduced to
update both kernel's DTS and u-boot's DTS.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ioana Ciornei [Tue, 23 May 2023 13:47:47 +0000 (16:47 +0300)]
cmd: net: add a 'net stats' command to dump network statistics
Add a new option to the 'net' command which can be used to dump network
statistics.
To do this, 3 new callbacks are added to the eth_ops structure:
.get_sset_count(), .get_strings(), .get_stats(). These callbacks
have the same functions as in Linux: to return the number of counters,
the strings which describe those counters and the actual values.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ioana Ciornei [Tue, 23 May 2023 13:47:46 +0000 (16:47 +0300)]
net: ldpaa_eth: extend debug capabilities with DPMAC statistics
The ldpaa_eth driver already had a DPMAC statistics dump, this patch
extends the list of stats and adds a bit more structure to the code.
For a bit more context, the DPAA2 u-boot software architecture uses a
default network interface object - a DPNI - which, at runtime, will get
connected to the currently used DPMAC object.
Each time the .stop() eth callback is called, the DPMAC is destroyed
thus any previous counters will get lost.
As a preparation for the next patches, we add a software kept set of
DPMAC counters which will get updated before each destroy operation
takes place.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ioana Ciornei [Tue, 23 May 2023 13:47:45 +0000 (16:47 +0300)]
net: ldpaa_eth: extend debug capabilities with DPNI statistics
The ldpaa_eth driver already had a DPNI statistics dump, this patch
extends the list of stats and adds a bit more structure to the code.
For a bit more context, the DPAA2 u-boot software architecture uses a
default network interface object - a DPNI - which, at runtime, will get
connected to the currently used DPMAC object.
Each time the .stop() eth callback is called, the DPNI is reset to its
original state, including its counters.
As a preparation for the next patches, we add a software kept set of
DPNI counters which will get updated before each reset operation takes
place.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ioana Ciornei [Tue, 23 May 2023 13:47:44 +0000 (16:47 +0300)]
net: ldpaa_eth: transform dpni_statistics from a struct to a union
In order to simplify code, dpni_statistics can be written as a union.
Using the raw accessors we can just loop through all the statistics from
a page without trying to access each an every one independently.
Make this change to a union.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ioana Ciornei [Tue, 23 May 2023 13:47:43 +0000 (16:47 +0300)]
net: ldpaa_eth: fix the memory layout of the dpmac_get_counters() API
Each MC commands has a specific predefined memory layout that gets
interpreted by the firmware. The dpmac_get_counters() API memory layout
is wrong, thus the results returned by the command are incorrect.
Fix this by updating the offset of the counter field.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
test/py: Account PCR updates properly during testing
Currently we only read the pcr updates once on test_tpm2_pcr_read().
It turns out that the tpm init sequence of force_init() which consists
of:
- tpm2 init
- tpm2 startup TPM2_SU_CLEAR
- tpm2 self_test full
- tpm2 clear TPM2_RH_LOCKOUT
With the recent changes of replacing 'tpm2 init' with 'tpm2 autostart'
we end up always running the full init. The reason is 'tpm init'
returns -EBUSY if the tpm is already open, while 'tpm autostart' handles
ths gracefully and continues with the initialization. It's worth noting
that this won't affect the device functionality at all since
retriggering the startup sequence and selftests has no side effects.
Instead of relying on the initial value, reread the 'known updates'
just before updating the PCR to ensure we read the correct values
before testing
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Instead of copy pasting the commands needed to start a TPM consisting
of:
- tpm init
- tpm startup TPM2_SU_CLEAR
- tpm2 self_test full
use the newly added 'autostart' which does the same thing and simplify
our python scripts
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
For a TPM device to be operational we need to initialize it and
perform its startup sequence. The 'tpm init' command currently calls
tpm_init() which ends up calling the ->open() per-device callback and
performs the initial hardware configuration as well as requesting
locality 0 for the caller. There no code that currently calls
tpm_init() without following up with a tpm_startup() and tpm_self_test_full()
or tpm_continue_self_test().
So let's add a 'tpm autostart' command and call tpm_auto_start() which
leaves the device in an operational state.
It's worth noting that calling tpm_init() only, doesn't allow a someone
to use the TPM since the startup sequence is mandatory. We always
repeat the pattern of calling
- tpm_init()
- tpm_startup()
- tpm_self_test_full() or tpm_continue_self_test()
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Add missing prototypes to fix the below sparse warnings
1. warning: no previous prototype for 'set_r5_halt_mode'
[-Wmissing-prototypes]
2. warning: no previous prototype for 'set_r5_tcm_mode'
[-Wmissing-prototypes]
3. warning: no previous prototype for 'release_r5_reset'
[-Wmissing-prototypes]
4.warning: no previous prototype for 'enable_clock_r5'
[-Wmissing-prototypes]
arm64: zynqmp: Fix lockstep mode cpu release functionality
For lockstep mode, cpu_release function is expecting to execute
on R5 core 0, if there is attempt to pass other than R5 core 0,
through an error saying "Lockstep mode should run on R5 core 0 only".
While invoking "zynqmp tcminit mode" command (which is invalid command)
on U-Boot, it just works. Check the mode param, if it is valid then
only initialize the TCM.
Stefan Roese [Thu, 25 May 2023 09:49:18 +0000 (11:49 +0200)]
PCI: zynqmp: Add ZynqMP NWL PCIe root port driver
This patch adds the PCIe controller driver for the Xilinx / AMD ZynqMP
NWL PCIe Bridge as root port. The driver source is partly copied from
the Linux PCI driver and modified to enable usage in U-Boot (e.g.
simplified and interrupt support removed).
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Pali Rohár <pali@kernel.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@amd.com> Tested-by: Michal Simek <michal.simek@amd.com> Acked-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/20230525094918.111949-1-sr@denx.de Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Thu, 1 Jun 2023 11:21:07 +0000 (13:21 +0200)]
arm64: zynqmp: Fix command error values properly
Process errors from command via cmd_process_error() as is done on Versal.
When internal function returns different number then CMD_RET_SUCCESS(0),
CMD_RET_FAILURE(1) or CMD_RET_USAGE(-1) shell react on these errors by
throwing an error like
"exit not allowed from main input shell." that's why use
cmd_process_error() to make sure that error code is all the time correct.
Michal Simek [Wed, 17 May 2023 08:42:12 +0000 (10:42 +0200)]
video: zynqmp: Enable 1024x768 resolution
Add support for 1024x768 60p resolution and set it up this resolution by
default. This resolution is still able to use only one GT line. But for
example 800x600 60p has some issues with settings. That's why extend this
table by tested resolutions.
video: zynqmp: Driver for Xilinx ZynqMP DisplayPort Subsystem
The Xilinx ZynqMP SoC has a hardened display pipeline named DisplayPort
Subsystem. It includes a buffer manager, blender, an audio mixer and a
DisplayPort source controller (transmitter). The DisplayPort controller can
source data from memory (non-live input) or the stream (live input). The
DisplayPort controller is responsible for managing the link and physical
layer functionality. The controller packs audio/video data into transfer
units and sends them over the main link. The link rate and lane counts can
be selected based on the application bandwidth requirements. The
DisplayPort pipeline consists of the DisplayPort direct memory access (DMA)
for fetching data from memory. The DisplayPort DMA controller (DPDMA)
supports up to six input channels as non-live input.
This driver supports the DisplayPort Subsystem and implements
1)640x480 resolution
2)RGBA8888 32bpp format
3)DPDMA channel 3 for Graphics
4)Non-live input
5)Fixed 5.4G link rate
6)Tested on ZCU102 board
There will be additional work to configure GT lines based on DT, higher
resolutions, support for more compressed video formats, spliting code to
more files, add support for EDID, audio support, using clock framework for
all clocks and in general code clean up.
Michal Simek [Wed, 17 May 2023 08:42:07 +0000 (10:42 +0200)]
video: Add support for RGBA8888 format
Add support for RGBA8888 32bpp format where pixels are picked in
32-bit integers, where the colors are stored in memory such that
R is at lowest address, G after that, B after that, and A last.
firmware: zynqmp: Move permission to change config object message
Move the permission to change a config object message from
zynqmp_pmufw_load_config_object function to zynqmp_pmufw_node function
to simplify the code and check the permission only if required.
firmware: zynqmp: Remove extraordinary return value
Return a common -EACCES error value instead of a positive private error
value XST_PM_NO_ACCESS (2002) in zynqmp_pmufw_load_config_object
function if the config object is not loadable to simplify the error
checking.
Michal Simek [Thu, 1 Jun 2023 10:32:36 +0000 (12:32 +0200)]
arm64: zynqmp: Check 0 node ID
ID is decimal not hexadecimal that's why passing hex number all the time
end's up as 0 that's why check it. Node ID 0 is not valid anyway.
Also properly say it in help.
Add missing prototypes to fix the below sparse warnings
1. warning: no previous prototype for 'soc_name_decode'
[-Wmissing-prototypes]
2. warning: no previous prototype for 'soc_detection'
[-Wmissing-prototypes]
3. warning: no previous prototype for 'board_name_decode'
[-Wmissing-prototypes]
4. warning: no previous prototype for 'board_detection'
[-Wmissing-prototypes]
Michal Simek [Wed, 17 May 2023 08:21:32 +0000 (10:21 +0200)]
arm64: versal-net: Add support for SPP production version
Production version restarting platform version field from 0 that's why add
new calculation to be able to use different DT for these platforms.
Requested DT names for production silicons for IPP/SPP and EMU platform are
versal-net-ipp-rev2.0.dts and versal-net-emu-rev2.0.dts.
If platform version increase numbers revision can be even higher.
As of today platform version is 2 that's why expected is rev2.2.
clk: zynqmp: Add fallthrough statement in the switch case
Add fallthrough statement in switch case to fix the sparse warning.
In function 'zynqmp_clk_get_rate': warning: this statement may
fall through [-Wimplicit-fallthrough=]
Detlev Casanova [Fri, 9 Jun 2023 15:19:08 +0000 (11:19 -0400)]
renesas: rcar: Apply ATF overlay for reserved-memory
The function fdtdec_board_setup() is called early and adds the overlay
from ATF to the u-boot device tree. That is necessary so that u-boot
doesn't use reserved memory.
Linux also needs to know about that reserved memory so the overlay from
ATF needs to be aplied on the linux device tree as well.
This commit makes sure that the ATF overlay is applied to both device trees.
Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Adam Ford <aford173@gmail.com>
ARM: dts: renesas: Add compatible properties to LAN8710A Ethernet PHYs
Add compatible values to Ethernet PHY subnodes representing SMSC
LAN8710A PHYs on RZ/A1 and R-Mobile A1 boards. This allows software to
identify the PHY model at any time, regardless of the state of the PHY
reset line.
In case RX error occurs, and the RD_RFE bit is set, the descriptor
is never returned back to the queue. Make sh_eth_recv_start return
zero length in this case so that the descriptor can be released
and pushed back to the list. Also return the more appropriate
-EAGAIN instead of -EINVAL if the descriptor is not ready yet.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
U-Boot writes to RX packets when constructing replies.
This can cause stale cached data to be written to RX
buffer while we're receiving a packet. This causes RX
packet corruption because we invalidate the cache right
before processing the packet. Invalidate packet buffer
cache when preparing RX descriptor as well. This seems
to fix RX packet drops with high RX traffic.
While at it flush the descriptors right before enabling
RX/TX in sh_eth_tx_desc_init/sh_eth_rx_desc_init callbacks
when they are ready instead of flushing after allocation.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Marek Vasut [Tue, 30 May 2023 22:51:26 +0000 (00:51 +0200)]
net: phy: Bind ETH_PHY uclass driver to each new PHY
In case a new PHY is created and DM_ETH_PHY is enabled, bind a
generic PHY driver from ETH_PHY uclass to the PHY to have a
matching DM representation of that PHY.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Cong Dang [Wed, 24 Aug 2022 23:06:54 +0000 (06:06 +0700)]
mtd: spi: renesas: Add 4 bytes address mode support
This patch adds 4-byte address mode support. Because traditional access
based on FIFO/shift register, it's complex to specify information like
opcode, address length, dummy bytes etc to flash. Replace the traditional
access by spi-mem layer which is essential to make 4-byte address mode
support possible.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Hai Pham [Thu, 5 Aug 2021 07:38:26 +0000 (14:38 +0700)]
mtd: spi: renesas: Add R-Car Gen4 support
Support RPC SPI on R-Car Gen4 R8A779F0 S4 and R8A779G0 V4H SoCs.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Squash S4 and V4H patches, fix brackets around STRTIM2]
Hai Pham [Thu, 25 Aug 2022 03:32:56 +0000 (10:32 +0700)]
mtd: spi: renesas: Enable SPI_FLASH_SFDP_SUPPORT
Enable support for parsing and auto discovery of parameters for
SPI NOR flashes using Serial Flash Discoverable Parameters (SFDP)
tables as per JESD216 standard.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Make SFDP the default unconditionally
Hai Pham [Mon, 16 Aug 2021 02:26:36 +0000 (09:26 +0700)]
mtd: spi: renesas: Extract strobe delay setting code into separate function
Move strobe delay setting code into extra function and reflect the latest
setting in datasheet (R-Car Gen3 v2.20, R-Car V3U v0.50).
i.e. STRTIM[2:0] should be set to 110 (RCar M3-W) or 111 (Other products)
This is also a preparation for new R-Car Gen4 SoC which has 4-bits STRTIM
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix for RZ/A1
Tom Rini [Sat, 10 Jun 2023 00:35:02 +0000 (20:35 -0400)]
Merge branch '2023-06-09-fwu-updates' into next
Two sets of FWU updates from Jassi Brar. First:
The patchset reduces ~400 lines of code, while keeping the functionality same and making
meta-data operations much faster (by using cached structures).
Issue:
meta-data copies (primary and secondary) are being handled by the
backend/storage layer instead of the common core in fwu.c (as also noted by
Ilias) that is, gpt_blk.c manages meta-data and similarly raw_mtd.c will have
to do the same when it arrives. The code could by make smaller, cleaner and
optimised.
Basic idea:
Introduce .read_mdata() and .write_mdata() in fwu_mdata_ops that simply
read/write meta-data copy. The core code takes care of integrity and redundancy
of the meta-data, as a result we can get rid of every other callback
.get_mdata() .update_mdata() .get_mdata_part_num() .read_mdata_partition()
.write_mdata_partition() and the corresponding wrapper functions thereby making
the code 100s of LOC smaller.
Get rid of fwu_check_mdata_validity() and fwu_mdata_check() which expected
underlying layer to manage and verify mdata copies.
Implement fwu_get_verified_mdata(struct fwu_mdata *mdata) public function that
reads, verifies and, if needed, fixes the meta-data copies.
Verified copy of meta-data is now cached as 'g_mdata' in fwu.c, which avoids
multiple low-level expensive read and parse calls.
gpt meta-data partition numbers are now cached in gpt_blk.c, so that we don't
have to do expensive part_get_info() and uid ops.
And second:
Introduce support for mtd backed storage for FWU feature and enable it on
Synquacer platform based DeveloperBox.
Jassi Brar [Wed, 31 May 2023 05:30:06 +0000 (00:30 -0500)]
fwu: provide default fwu_plat_get_bootidx
Just like fwu_plat_get_update_index, provide a default/weak
implementation of fwu_plat_get_bootidx. So that most platforms
wouldn't have to re-implement the likely case.
Jassi Brar [Wed, 31 May 2023 05:29:56 +0000 (00:29 -0500)]
fwu: DeveloperBox: add support for FWU
Add code to support FWU_MULTI_BANK_UPDATE.
The platform does not have gpt-partition storage for
Banks and MetaData, rather it used SPI-NOR backed
mtd regions for the purpose.
Masami Hiramatsu [Wed, 31 May 2023 05:29:14 +0000 (00:29 -0500)]
FWU: Add FWU metadata access driver for MTD storage regions
In the FWU Multi Bank Update feature, the information about the
updatable images is stored as part of the metadata, on a separate
region. Add a driver for reading from and writing to the metadata
when the updatable images and the metadata are stored on a raw
MTD region.
The code is divided into core under drivers/fwu-mdata/ and some helper
functions clubbed together under lib/fwu_updates/
Jassi Brar [Mon, 6 Mar 2023 23:18:58 +0000 (17:18 -0600)]
test: dm: fwu: fix for the updated api
fwu_get_mdata() no more requires 'dev' argument and
fwu_check_mdata_validity() has been rendered useless and dropped.
Fix the test cases to work with aforementioned changes.
Jassi Brar [Mon, 6 Mar 2023 23:18:41 +0000 (17:18 -0600)]
fwu: meta-data: switch to management by common code
The common code can now read, verify and fix meta-data copies
while exposing one consistent structure to users.
Only the .read_mdata() and .write_mdata() callbacks of fwu_mdata_ops
are needed. Get rid of .get_mdata() .update_mdata() .get_mdata_part_num()
.read_mdata_partition() and .write_mdata_partition() and also the
corresponding wrapper functions.
Jassi Brar [Mon, 6 Mar 2023 23:18:28 +0000 (17:18 -0600)]
fwu: move meta-data management in core
Instead of each i/f having to implement their own meta-data verification
and storage, move the logic in common code. This simplifies the i/f code
much simpler and compact.
Jassi Brar [Mon, 6 Mar 2023 23:18:14 +0000 (17:18 -0600)]
dt/bindings: fwu-mdata-mtd: drop changes outside FWU
Any requirement of FWU should not require changes to bindings
of other subsystems. For example, for mtd-backed storage we
can do without requiring 'fixed-partitions' children to also
carry 'uuid', a property which is non-standard and not in the
bindings.
There exists no code yet, so we can change the fwu-mtd bindings
to contain all properties within the fwu-mdata node.
Import R8A77980 V3HSK DTs from Linux 6.1.31,
commit d2869ace6eeb ("Linux 6.1.31").
Extracted from a larger patch by Valentine Barshak.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Sync with 6.1.31
Import R8A77970 V3MSK DTs from Linux 6.1.31,
commit d2869ace6eeb ("Linux 6.1.31").
Extracted from a larger patch by Valentine Barshak.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Sync with 6.1.31
The reset_cpu() implementation is basically the same across Gen3
SoCs and identical across Gen4 SoCs. Introduce weak default for
reset_cpu(), so that it does not have to be duplicated in every
board file again.
There is a slight difference for CA53 only systems, like E3 and D3,
which now check MIDR for CPU ID first just like the other systems,
but this is OK since the MIDR always returns CA53 core type and the
correct reset register is written.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
projects / u-boot.git / log
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