From: Peng Fan <peng.fan@nxp.com>
Date: Tue, 24 Sep 2024 07:31:59 +0000 (+0800)
Subject: net: fec_mxc: Fix clk_ref rate on iMX93
X-Git-Url: http://git.dujemihanovic.xyz/html/static/git-favicon.png?a=commitdiff_plain;h=94d02f13dbc582cf0644a53da33cc4ad9213661f;p=u-boot.git

net: fec_mxc: Fix clk_ref rate on iMX93

i.MX93 FEC ENET port supports two mode: RGMII and RMII. For RGMII,
there is an internal /2 divider, so the freq needs to set with (*2),
otherwise the speed will not reach 1G and cause communication error
in some network environments. For RMII, the clk path is
ccm -> enet tx_clk pin -> pad loop back to enet, no /2 divider.

So fix for RGMII mode with freq multiplied by 2.

Fixes: 09de565f76b ("net: fec_mxc: support i.MX93")
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---

diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 0a0d92bc2c..d0590fd137 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -1210,10 +1210,13 @@ static int fecmxc_set_ref_clk(struct clk *clk_ref, phy_interface_t interface)
 	else if (interface == PHY_INTERFACE_MODE_RGMII ||
 		 interface == PHY_INTERFACE_MODE_RGMII_ID ||
 		 interface == PHY_INTERFACE_MODE_RGMII_RXID ||
-		 interface == PHY_INTERFACE_MODE_RGMII_TXID)
+		 interface == PHY_INTERFACE_MODE_RGMII_TXID) {
 		freq = 125000000;
-	else
+		if (is_imx93())
+			freq = freq << 1;
+	} else {
 		return -EINVAL;
+	}
 
 	ret = clk_set_rate(clk_ref, freq);
 	if (ret < 0)