]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME
authorSimon Glass <sjg@chromium.org>
Fri, 10 Jul 2020 00:43:16 +0000 (18:43 -0600)
committerBin Meng <bmeng.cn@gmail.com>
Fri, 17 Jul 2020 06:32:24 +0000 (14:32 +0800)
At present this enables a few arch-specific members of the global_data
struct which are otherwise not part of the struct. As a result we have to
use #ifdef in various places.

The cost of always having these in the struct is small. Adjust things so
that we can use compile-time code instead of #ifdefs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/cpu/apollolake/cpu_spl.c
arch/x86/cpu/apollolake/fsp_s.c
arch/x86/cpu/baytrail/acpi.c
arch/x86/cpu/broadwell/power_state.c
arch/x86/cpu/cpu.c
arch/x86/include/asm/global_data.h
arch/x86/lib/coreboot_table.c
arch/x86/lib/fsp/fsp_common.c
arch/x86/lib/fsp/fsp_dram.c
arch/x86/lib/fsp1/fsp_common.c
arch/x86/lib/fsp2/fsp_dram.c

index 707ceb3e643cfabb2416de6b50b6098d9e6bfe75..9f32f2e27e125e2d69a6a8b8fa820c00c571f1dd 100644 (file)
@@ -247,12 +247,13 @@ static int arch_cpu_init_spl(void)
        ret = pmc_init(pmc);
        if (ret < 0)
                return log_msg_ret("Could not init PMC", ret);
-#ifdef CONFIG_HAVE_ACPI_RESUME
-       ret = pmc_prev_sleep_state(pmc);
-       if (ret < 0)
-               return log_msg_ret("Could not get PMC sleep state", ret);
-       gd->arch.prev_sleep_state = ret;
-#endif
+       if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
+               ret = pmc_prev_sleep_state(pmc);
+               if (ret < 0)
+                       return log_msg_ret("Could not get PMC sleep state",
+                                          ret);
+               gd->arch.prev_sleep_state = ret;
+       }
 
        return 0;
 }
index 767ddfe680140ecd497c96d11aa32045c7c7c435..13e6b20f089b69d4733d592263240aa04cc94235 100644 (file)
@@ -192,16 +192,16 @@ int arch_fsps_preinit(void)
 
 int arch_fsp_init_r(void)
 {
-#ifdef CONFIG_HAVE_ACPI_RESUME
-       bool s3wake = gd->arch.prev_sleep_state == ACPI_S3;
-#else
-       bool s3wake = false;
-#endif
+       bool s3wake;
        struct udevice *dev, *itss;
        int ret;
 
        if (!ll_boot_init())
                return 0;
+
+       s3wake = IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) &&
+               gd->arch.prev_sleep_state == ACPI_S3;
+
        /*
         * This must be called before any devices are probed. Put any probing
         * into arch_fsps_preinit() above.
index 65f2006a0af32352ad269fb4939afee6605fd746..b17bc62a2dbbde1c405ee3a6600b06ed6c56db6b 100644 (file)
@@ -161,7 +161,6 @@ void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
                gnvs->iuart_en = 0;
 }
 
-#ifdef CONFIG_HAVE_ACPI_RESUME
 /*
  * The following two routines are called at a very early stage, even before
  * FSP 2nd phase API fsp_init() is called. Registers off ACPI_BASE_ADDRESS
@@ -204,4 +203,3 @@ void chipset_clear_sleep_state(void)
        pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT);
        outl(pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT);
 }
-#endif
index 99d6f72cf6e4b13a5b66dc01a8ec7126d0e0f31b..62fd2e8d2c0e85e0f8376ce54ee425911266e1a6 100644 (file)
@@ -23,11 +23,10 @@ static int prev_sleep_state(struct chipset_power_state *ps)
 
        if (ps->pm1_sts & WAK_STS) {
                switch ((ps->pm1_cnt & SLP_TYP) >> SLP_TYP_SHIFT) {
-#if CONFIG_HAVE_ACPI_RESUME
                case SLP_TYP_S3:
-                       prev_sleep_state = SLEEP_STATE_S3;
+                       if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME))
+                               prev_sleep_state = SLEEP_STATE_S3;
                        break;
-#endif
                case SLP_TYP_S5:
                        prev_sleep_state = SLEEP_STATE_S5;
                        break;
index a814e7d7a649896c0c13e945dc9392bd54e543f5..23a4d633d2d8ce8c55b5cf2ce9d873036ba6fe8e 100644 (file)
@@ -163,10 +163,10 @@ int default_print_cpuinfo(void)
               cpu_has_64bit() ? "x86_64" : "x86",
               cpu_vendor_name(gd->arch.x86_vendor), gd->arch.x86_device);
 
-#ifdef CONFIG_HAVE_ACPI_RESUME
-       debug("ACPI previous sleep state: %s\n",
-             acpi_ss_string(gd->arch.prev_sleep_state));
-#endif
+       if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
+               debug("ACPI previous sleep state: %s\n",
+                     acpi_ss_string(gd->arch.prev_sleep_state));
+       }
 
        return 0;
 }
@@ -191,12 +191,12 @@ int last_stage_init(void)
 
        board_final_cleanup();
 
-#ifdef CONFIG_HAVE_ACPI_RESUME
-       fadt = acpi_find_fadt();
+       if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
+               fadt = acpi_find_fadt();
 
-       if (fadt && gd->arch.prev_sleep_state == ACPI_S3)
-               acpi_resume(fadt);
-#endif
+               if (fadt && gd->arch.prev_sleep_state == ACPI_S3)
+                       acpi_resume(fadt);
+       }
 
        write_tables();
 
@@ -277,17 +277,17 @@ int reserve_arch(void)
        high_table_reserve();
 #endif
 
-#ifdef CONFIG_HAVE_ACPI_RESUME
-       acpi_s3_reserve();
+       if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
+               acpi_s3_reserve();
 
-#ifdef CONFIG_HAVE_FSP
-       /*
-        * Save stack address to CMOS so that at next S3 boot,
-        * we can use it as the stack address for fsp_contiue()
-        */
-       fsp_save_s3_stack();
-#endif /* CONFIG_HAVE_FSP */
-#endif /* CONFIG_HAVE_ACPI_RESUME */
+               if (IS_ENABLED(CONFIG_HAVE_FSP)) {
+                       /*
+                        * Save stack address to CMOS so that at next S3 boot,
+                        * we can use it as the stack address for fsp_contiue()
+                        */
+                       fsp_save_s3_stack();
+               }
+       }
 
        return 0;
 }
index 4aee2f3e8c46554ef6b40fc18bc94fde96145338..0e64c8a46db4430a5cce565a284c752a441943ab 100644 (file)
@@ -116,10 +116,8 @@ struct arch_global_data {
        u32 high_table_ptr;
        u32 high_table_limit;
 #endif
-#ifdef CONFIG_HAVE_ACPI_RESUME
        int prev_sleep_state;           /* Previous sleep state ACPI_S0/1../5 */
        ulong backup_mem;               /* Backup memory address for S3 */
-#endif
 #ifdef CONFIG_FSP_VERSION2
        struct fsp_header *fsp_s_hdr;   /* Pointer to FSP-S header */
 #endif
index 331c1b7e5a98b2ee8585bd8aae7a8ab73f236c91..6cd324430121085cfabd40790af8dd78a6101e26 100644 (file)
@@ -21,11 +21,11 @@ int high_table_reserve(void)
        gd->arch.high_table_ptr = gd->start_addr_sp;
 
        /* clear the memory */
-#ifdef CONFIG_HAVE_ACPI_RESUME
-       if (gd->arch.prev_sleep_state != ACPI_S3)
-#endif
+       if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) &&
+           gd->arch.prev_sleep_state != ACPI_S3) {
                memset((void *)gd->arch.high_table_ptr, 0,
                       CONFIG_HIGH_TABLE_SIZE);
+       }
 
        gd->start_addr_sp &= ~0xf;
 
index cf32b3e512f238ef30fbadafe5fb2ab18c7bcdfb..8e3082d4c8d40806042a5dff8ce69245bb130f3f 100644 (file)
@@ -60,7 +60,6 @@ void board_final_cleanup(void)
                debug("OK\n");
 }
 
-#ifdef CONFIG_HAVE_ACPI_RESUME
 int fsp_save_s3_stack(void)
 {
        struct udevice *dev;
@@ -84,4 +83,3 @@ int fsp_save_s3_stack(void)
 
        return 0;
 }
-#endif
index ad5a0f79adf76bc90969862572dd059dfcb6c49a..01d498c21ed602533de0416445d0a39d856eb4e5 100644 (file)
@@ -117,17 +117,21 @@ unsigned int install_e820_map(unsigned int max_entries,
        entries[num_entries].type = E820_RESERVED;
        num_entries++;
 
-#ifdef CONFIG_HAVE_ACPI_RESUME
-       /*
-        * Everything between U-Boot's stack and ram top needs to be
-        * reserved in order for ACPI S3 resume to work.
-        */
-       entries[num_entries].addr = gd->start_addr_sp - CONFIG_STACK_SIZE;
-       entries[num_entries].size = gd->ram_top - gd->start_addr_sp +
-               CONFIG_STACK_SIZE;
-       entries[num_entries].type = E820_RESERVED;
-       num_entries++;
-#endif
+       if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
+               ulong stack_size;
+
+               stack_size = CONFIG_IS_ENABLED(HAVE_ACPI_RESUME,
+                                              (CONFIG_STACK_SIZE), (0));
+               /*
+                * Everything between U-Boot's stack and ram top needs to be
+                * reserved in order for ACPI S3 resume to work.
+                */
+               entries[num_entries].addr = gd->start_addr_sp - stack_size;
+               entries[num_entries].size = gd->ram_top - gd->start_addr_sp +
+                       stack_size;
+               entries[num_entries].type = E820_RESERVED;
+               num_entries++;
+       }
 
        return num_entries;
 }
index 43d32b7abefc3e261fe2c6781769ca4063327f2a..da351cf097c074e94769db11f2a4d071e168e429 100644 (file)
@@ -46,10 +46,12 @@ int arch_fsp_init(void)
        void *nvs;
        int stack = CONFIG_FSP_TEMP_RAM_ADDR;
        int boot_mode = BOOT_FULL_CONFIG;
-#ifdef CONFIG_HAVE_ACPI_RESUME
-       int prev_sleep_state = chipset_prev_sleep_state();
-       gd->arch.prev_sleep_state = prev_sleep_state;
-#endif
+       int prev_sleep_state;
+
+       if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
+               prev_sleep_state = chipset_prev_sleep_state();
+               gd->arch.prev_sleep_state = prev_sleep_state;
+       }
 
        if (!gd->arch.hob_list) {
                if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE))
@@ -57,8 +59,8 @@ int arch_fsp_init(void)
                else
                        nvs = NULL;
 
-#ifdef CONFIG_HAVE_ACPI_RESUME
-               if (prev_sleep_state == ACPI_S3) {
+               if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) &&
+                   prev_sleep_state == ACPI_S3) {
                        if (nvs == NULL) {
                                /* If waking from S3 and no cache then */
                                debug("No MRC cache found in S3 resume path\n");
@@ -79,7 +81,7 @@ int arch_fsp_init(void)
                        stack = cmos_read32(CMOS_FSP_STACK_ADDR);
                        boot_mode = BOOT_ON_S3_RESUME;
                }
-#endif
+
                /*
                 * The first time we enter here, call fsp_init().
                 * Note the execution does not return to this function,
index 1c82b818313431c3f3b91e3b5768e183d601aad7..c9f6402e6a4c730ae0e813106b0d0c2a7f3eb920 100644 (file)
@@ -27,11 +27,10 @@ int dram_init(void)
                return 0;
        }
        if (spl_phase() == PHASE_SPL) {
-#ifdef CONFIG_HAVE_ACPI_RESUME
-               bool s3wake = gd->arch.prev_sleep_state == ACPI_S3;
-#else
                bool s3wake = false;
-#endif
+
+               s3wake = IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) &&
+                       gd->arch.prev_sleep_state == ACPI_S3;
 
                ret = fsp_memory_init(s3wake,
                              IS_ENABLED(CONFIG_APL_BOOT_FROM_FAST_SPI_FLASH));