clk: zynq: Move soc_clk_dump to Zynq clock driver

Move clock dump function in preparation for switching to dump function
in clk_ops.

Acked-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Link: https://lore.kernel.org/r/20231109105516.24892-2-ivprusov@sberdevices.ru

diff --git a/arch/arm/mach-zynq/clk.c b/arch/arm/mach-zynq/clk.c
index 1945f60e08f9f3234acf334309bd33d122786437..e6a67326dd4a51cc3f48a7ddd700fe2f51198997 100644 (file)
--- a/arch/arm/mach-zynq/clk.c
+++ b/arch/arm/mach-zynq/clk.c
@@ -13,20 +13,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static const char * const clk_names[clk_max] = {
-       "armpll", "ddrpll", "iopll",
-       "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x",
-       "ddr2x", "ddr3x", "dci",
-       "lqspi", "smc", "pcap", "gem0", "gem1",
-       "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
-       "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma",
-       "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper",
-       "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper",
-       "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
-       "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper",
-       "smc_aper", "swdt", "dbg_trc", "dbg_apb"
-};
-
 /**
  * set_cpu_clk_info() - Setup clock information
  *
@@ -65,46 +51,3 @@ int set_cpu_clk_info(void)
 
        return 0;
 }
-
-/**
- * soc_clk_dump() - Print clock frequencies
- * Returns zero on success
- *
- * Implementation for the clk dump command.
- */
-int soc_clk_dump(void)
-{
-       struct udevice *dev;
-       int i, ret;
-
-       ret = uclass_get_device_by_driver(UCLASS_CLK,
-               DM_DRIVER_GET(zynq_clk), &dev);
-       if (ret)
-               return ret;
-
-       printf("clk\t\tfrequency\n");
-       for (i = 0; i < clk_max; i++) {
-               const char *name = clk_names[i];
-               if (name) {
-                       struct clk clk;
-                       unsigned long rate;
-
-                       clk.id = i;
-                       ret = clk_request(dev, &clk);
-                       if (ret < 0)
-                               return ret;
-
-                       rate = clk_get_rate(&clk);
-
-                       clk_free(&clk);
-
-                       if ((rate == (unsigned long)-ENOSYS) ||
-                           (rate == (unsigned long)-ENXIO))
-                               printf("%10s%20s\n", name, "unknown");
-                       else
-                               printf("%10s%20lu\n", name, rate);
-               }
-       }
-
-       return 0;
-}

diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c
index e80500e382b86b2cfe3da136efab4953b86e8423..be5226175f99af8b49eada49e47487a95c6655ae 100644 (file)
--- a/drivers/clk/clk_zynq.c
+++ b/drivers/clk/clk_zynq.c
@@ -454,6 +454,64 @@ static int dummy_enable(struct clk *clk)
        return 0;
 }
 
+static const char * const clk_names[clk_max] = {
+       "armpll", "ddrpll", "iopll",
+       "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x",
+       "ddr2x", "ddr3x", "dci",
+       "lqspi", "smc", "pcap", "gem0", "gem1",
+       "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
+       "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma",
+       "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper",
+       "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper",
+       "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
+       "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper",
+       "smc_aper", "swdt", "dbg_trc", "dbg_apb"
+};
+
+/**
+ * soc_clk_dump() - Print clock frequencies
+ * Returns zero on success
+ *
+ * Implementation for the clk dump command.
+ */
+int soc_clk_dump(void)
+{
+       struct udevice *dev;
+       int i, ret;
+
+       ret = uclass_get_device_by_driver(UCLASS_CLK,
+                                         DM_DRIVER_GET(zynq_clk), &dev);
+       if (ret)
+               return ret;
+
+       printf("clk\t\tfrequency\n");
+       for (i = 0; i < clk_max; i++) {
+               const char *name = clk_names[i];
+
+               if (name) {
+                       struct clk clk;
+                       unsigned long rate;
+
+                       clk.id = i;
+                       ret = clk_request(dev, &clk);
+                       if (ret < 0)
+                               return ret;
+
+                       rate = clk_get_rate(&clk);
+
+                       clk_free(&clk);
+
+                       if ((rate == (unsigned long)-ENOSYS) ||
+                           (rate == (unsigned long)-ENXIO))
+                               printf("%10s%20s\n", name, "unknown");
+                       else
+                               printf("%10s%20lu\n", name, rate);
+               }
+       }
+
+       return 0;
+}
+
 static struct clk_ops zynq_clk_ops = {
        .get_rate = zynq_clk_get_rate,
 #ifndef CONFIG_SPL_BUILD