clk: rockchip: rk3328: Add SCLK_USB3OTG_REF support

The SCLK_USB3OTG_REF clocks is used as reference clock for USB3 block.

Add simple support to get rate of SCLK_USB3OTG_REF clocks to fix
reference clock period configuration.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 87075ec71340ee6c49d1998adb4ab0879d3bd9cf..314b903eaa03ea8b05044bbd4408da99946106f7 100644 (file)
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -706,6 +706,9 @@ static ulong rk3328_clk_get_rate(struct clk *clk)
        case PCLK_HDMIPHY:
                rate = rk3328_hdmiphy_get_clk(priv->cru);
                break;
+       case SCLK_USB3OTG_REF:
+               rate = OSC_HZ;
+               break;
        default:
                return -ENOENT;
        }
@@ -780,6 +783,7 @@ static ulong rk3328_clk_set_rate(struct clk *clk, ulong rate)
        case PCLK_DDR:
        case ACLK_GMAC:
        case PCLK_GMAC:
+       case SCLK_USB3OTG_REF:
        case SCLK_USB3OTG_SUSPEND:
        case USB480M:
                return 0;