#include <dt-bindings/input/input.h>
/ {
- model = "samtec VIN|ING FPGA";
+ model = "Softing VIN|ING FPGA";
compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
chosen {
bool "IS1 (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
-config TARGET_SOCFPGA_SAMTEC_VINING_FPGA
- bool "samtec VIN|ING FPGA (Cyclone V)"
+config TARGET_SOCFPGA_SOFTING_VINING_FPGA
+ bool "Softing VIN|ING FPGA (Cyclone V)"
select BOARD_LATE_INIT
select TARGET_SOCFPGA_CYCLONE5
default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
default "sr1500" if TARGET_SOCFPGA_SR1500
default "stratix10-socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK
- default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
+ default "vining_fpga" if TARGET_SOCFPGA_SOFTING_VINING_FPGA
config SYS_VENDOR
default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK
default "devboards" if TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1
default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
- default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
+ default "softing" if TARGET_SOCFPGA_SOFTING_VINING_FPGA
default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC
default "terasic" if TARGET_SOCFPGA_TERASIC_DE10_NANO
default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
default "socfpga_stratix10_socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK
- default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
+ default "socfpga_vining_fpga" if TARGET_SOCFPGA_SOFTING_VINING_FPGA
endif
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
-CONFIG_TARGET_SOCFPGA_SAMTEC_VINING_FPGA=y
+CONFIG_TARGET_SOCFPGA_SOFTING_VINING_FPGA=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),64k(env1),64k(env2),256k(samtec1),256k(samtec2),-(rcvrfs);"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),64k(env1),64k(env2),256k(softing1),256k(softing2),-(rcvrfs);"
CONFIG_CMD_UBI=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
CONFIG_DM_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="samtec"
+CONFIG_USB_GADGET_MANUFACTURER="softing"
CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_USB_GADGET_DWC2_OTG=y
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright (C) 2015 Marek Vasut <marex@denx.de>
+ * Copyright (C) 2015-2019 Marek Vasut <marex@denx.de>
*/
-#ifndef __CONFIG_SAMTEC_VINING_FPGA_H__
-#define __CONFIG_SAMTEC_VINING_FPGA_H__
+#ifndef __CONFIG_SOFTING_VINING_FPGA_H__
+#define __CONFIG_SOFTING_VINING_FPGA_H__
#include <asm/arch/base_addr_ac5.h>
"1m(u-boot)," \
"64k(env1)," \
"64k(env2)," \
- "256k(samtec1)," \
- "256k(samtec2)," \
+ "256k(softing1)," \
+ "256k(softing2)," \
"-(rcvrfs)\0" /* Recovery */ \
"mtdparts_1=ff705000.spi.1:" \
"32m(rootfs)," \
/* The rest of the configuration is shared */
#include <configs/socfpga_common.h>
-#endif /* __CONFIG_SAMTEC_VINING_FPGA_H__ */
+#endif /* __CONFIG_SOFTING_VINING_FPGA_H__ */