Update defconfig for rk3328-evb with new defaults.
Add DM_RESET=y to support using reset signals.
Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Add CMD_GPIO=y and CMD_REGULATOR=y to add the helpful gpio and regulator
commands.
Add MISC_INIT_R=y, ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y,
ethaddr and eth1addr is set based on cpuid read from eFUSE.
Remove pinctrl-0 and pinctrl-names from CONFIG_OF_SPL_REMOVE_PROPS,
SPL need to configure pinctrl for e.g. SD-card.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common
ethernet PHYs.
Remove REGULATOR_PWM=y, the pwm-regulator compatible is not used.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Add SYSINFO=y to support the sysinfo uclass.
Also add missing device tree files to MAINTAINERS and remove the
obsolete README file.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
F: board/rockchip/evb_rk3328
F: include/configs/evb_rk3328.h
F: configs/evb-rk3328_defconfig
+F: arch/arm/dts/rk3328-evb.dts
+F: arch/arm/dts/rk3328-evb-u-boot.dtsi
NANOPI-R2C-RK3328
M: Tianling Shen <cnsztl@gmail.com>
+++ /dev/null
-Introduction
-============
-
-RK3328 key features we might use in U-Boot:
-* CPU: ARMv8 64bit quad-core Cortex-A53
-* IRAM: 36KB
-* DRAM: 4GB-16MB dual-channel
-* eMMC: support eMMC 5.0/5.1, suport HS400, HS200, DDR50
-* SD/MMC: support SD 3.0, MMC 4.51
-* USB: USB2.0 EHCI host port *2
-* Display: RGB/HDMI/DP/MIPI/EDP
-
-evb key features:
-* regulator: pwm regulator for CPU B/L
-* PMIC: rk808
-* debug console: UART2
-
-In order to support Arm Trust Firmware(ATF), we need to use the
-miniloader from rockchip which:
-* do DRAM init
-* load and verify ATF image
-* load and verify U-Boot image
-
-Here is the step-by-step to boot to U-Boot on rk3328.
-
-Get the Source and prebuild binary
-==================================
-
- > mkdir ~/evb_rk3328
- > cd ~/evb_rk3328
- > git clone https://github.com/ARM-software/arm-trusted-firmware.git
- > git clone https://github.com/rockchip-linux/rkbin
- > git clone https://github.com/rockchip-linux/rkflashtool
-
-Compile ATF
-===============
-
- > cd arm-trusted-firmware
- > make realclean
- > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328 bl31
-
-Compile U-Boot
-==================
-
- > cd ../u-boot
- > make CROSS_COMPILE=aarch64-linux-gnu- evb-rk3328_defconfig all
-
-Compile rkflashtool
-=======================
-
- > cd ../rkflashtool
- > make
-
-Package image for miniloader
-================================
- > cd ..
- > cp arm-trusted-firmware/build/rk3328/release/bl31.bin rkbin/rk33
- > ./rkbin/tools/trust_merger rkbin/tools/RK3328TRUST.ini
- > ./rkbin/tools/loaderimage --pack --uboot u-boot/u-boot-dtb.bin uboot.img
- > mkdir image
- > mv trust.img ./image/
- > mv uboot.img ./image/rk3328evb-uboot.bin
-
-Flash image
-===============
-Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
-
- > ./rkflashtool/rkflashloader rk3328evb
-
-You should be able to get U-Boot log message in console/UART2 now.
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb"
+CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3328=y
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x4000000
CONFIG_SPL_STACK=0x400000
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-evb.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_PAD_TO=0x7f8000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL_SYS_MALLOC_SIMPLE=y
-CONFIG_TPL_DRIVERS_MISC=y
CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
+CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_TPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_TPL_OF_PLATDATA=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_TPL_REGMAP=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSINFO=y
CONFIG_SYSRESET=y
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y