clk: rockchip: rk3588: Add REF_CLK_USB3OTGx support

The REF_CLK_USB3OTGx clocks is used as reference clock for USB3 block.

Add simple support to get rate of REF_CLK_USB3OTGx clocks to fix
reference clock period configuration.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c
index 8f33843179b0b52607546fcb6b0f80324a78825a..4c611a390499201dd1fc93e5d589ae5094c957a5 100644 (file)
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1569,6 +1569,9 @@ static ulong rk3588_clk_get_rate(struct clk *clk)
        case DCLK_DECOM:
                rate = rk3588_mmc_get_clk(priv, clk->id);
                break;
+       case REF_CLK_USB3OTG0:
+       case REF_CLK_USB3OTG1:
+       case REF_CLK_USB3OTG2:
        case TMCLK_EMMC:
        case TCLK_WDT0:
                rate = OSC_HZ;
@@ -1734,6 +1737,9 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate)
        case DCLK_DECOM:
                ret = rk3588_mmc_set_clk(priv, clk->id, rate);
                break;
+       case REF_CLK_USB3OTG0:
+       case REF_CLK_USB3OTG1:
+       case REF_CLK_USB3OTG2:
        case TMCLK_EMMC:
        case TCLK_WDT0:
                ret = OSC_HZ;