ppc4xx: AMCC PPC460GT/EX PCI-E de-emphasis adjustment fix

During recent PCI-E tests it has been found that current
driverl level and de-emphasis values are not set correctly.
After sweeping throgh all de-ephasis values, it was found that
0x130 is a right value. Where 0x13 is driver level and 0 is
de-emphasis.

Signed-off-by: Tirumala R Marri <tmarri@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>

diff --git a/cpu/ppc4xx/4xx_pcie.c b/cpu/ppc4xx/4xx_pcie.c
index 9803fcc768886c40e3d78ac3fb203407fe28d71c..0aadc06a9e52221d4f9f51d8866cf97168320a55 100644 (file)
--- a/cpu/ppc4xx/4xx_pcie.c
+++ b/cpu/ppc4xx/4xx_pcie.c
@@ -638,7 +638,7 @@ int __ppc4xx_init_pcie_port_hw(int port, int rootport)
        switch (port) {
        case 0:
                SDR_WRITE(PESDR0_L0CDRCTL, 0x00003230);
-               SDR_WRITE(PESDR0_L0DRV, 0x00000136);
+               SDR_WRITE(PESDR0_L0DRV, 0x00000130);
                SDR_WRITE(PESDR0_L0CLK, 0x00000006);
 
                SDR_WRITE(PESDR0_PHY_CTL_RST,0x10000000);
@@ -649,10 +649,10 @@ int __ppc4xx_init_pcie_port_hw(int port, int rootport)
                SDR_WRITE(PESDR1_L1CDRCTL, 0x00003230);
                SDR_WRITE(PESDR1_L2CDRCTL, 0x00003230);
                SDR_WRITE(PESDR1_L3CDRCTL, 0x00003230);
-               SDR_WRITE(PESDR1_L0DRV, 0x00000136);
-               SDR_WRITE(PESDR1_L1DRV, 0x00000136);
-               SDR_WRITE(PESDR1_L2DRV, 0x00000136);
-               SDR_WRITE(PESDR1_L3DRV, 0x00000136);
+               SDR_WRITE(PESDR1_L0DRV, 0x00000130);
+               SDR_WRITE(PESDR1_L1DRV, 0x00000130);
+               SDR_WRITE(PESDR1_L2DRV, 0x00000130);
+               SDR_WRITE(PESDR1_L3DRV, 0x00000130);
                SDR_WRITE(PESDR1_L0CLK, 0x00000006);
                SDR_WRITE(PESDR1_L1CLK, 0x00000006);
                SDR_WRITE(PESDR1_L2CLK, 0x00000006);