mtd: spi-nor-ids: Add Puya Semiconductor chips description

Added support for the Puya Semiconductor chips.

The datasheet can be found here:
https://www.puyasemi.com/h_xilie715.html

Signed-off-by: Dmitry Dunaev <dunaev@tecon.ru>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>

diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 63b0fd899fd81c3c55f89689930dcd4feb86aa7a..ca60a425ba3413621a8b84109b6ccc533ea79e60 100644 (file)
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -176,6 +176,11 @@ config SPI_FLASH_MACRONIX
        help
          Add support for various Macronix SPI flash chips (MX25Lxxx)
 
+config SPI_FLASH_PUYA
+       bool "Puya Semiconductor SPI flash support"
+       help
+         Add support for various Puya Semiconductor SPI flash chips (P25xxx)
+
 config SPI_FLASH_SILICONKAISER
        bool "Silicon Kaiser SPI flash support"
        help

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index dfe92c3986e05521ef4c3280893cc7f3252a5f7a..10654d5dc6f9497f3d33e805c00247c5b0f6cdef 100644 (file)
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -294,6 +294,36 @@ const struct flash_info spi_nor_ids[] = {
        { INFO("mx25uw6445g",    0xc28137, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) },
        { INFO("mx25uw6345g",    0xc28437, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) },
 #endif
+#ifdef CONFIG_SPI_FLASH_PUYA
+       /* Puya Semiconductor (Shanghai) Co., Ltd */
+       { INFO
+        ("p25q05h", 0x856010, 0, 64 * 1024, 1,
+         SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+       { INFO
+        ("p25q10h", 0x856011, 0, 64 * 1024, 2,
+         SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+       { INFO
+        ("p25q20h", 0x856012, 0, 64 * 1024, 4,
+         SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+       { INFO
+        ("p25q40h", 0x856013, 0, 64 * 1024, 8,
+         SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+       { INFO
+        ("p25q80h", 0x856014, 0, 64 * 1024, 16,
+         SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+       { INFO
+        ("p25q16h", 0x856015, 0, 64 * 1024, 32,
+         SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+       { INFO
+        ("p25q32h", 0x856016, 0, 64 * 1024, 64,
+         SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+       { INFO
+        ("p25q64h", 0x856017, 0, 64 * 1024, 128,
+         SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+       { INFO
+        ("p25q128h", 0x856018, 0, 64 * 1024, 256,
+         SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+#endif
 
 #ifdef CONFIG_SPI_FLASH_SILICONKAISER
        { INFO("sk25lp128", 0x257018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },