#define GPIO_PER_BANK 32
+struct imx_rgpio2p_soc_data {
+ bool have_dual_base;
+};
+
+#define IMX8ULP_GPIO_BASE_OFF 0x40
+
struct imx_rgpio2p_data {
struct gpio_regs *regs;
};
static int imx_rgpio2p_bind(struct udevice *dev)
{
struct imx_rgpio2p_plat *plat = dev_get_plat(dev);
+ struct imx_rgpio2p_soc_data *data =
+ (struct imx_rgpio2p_soc_data *)dev_get_driver_data(dev);
+ bool dual_base = data->have_dual_base;
fdt_addr_t addr;
/*
if (plat)
return 0;
- addr = devfdt_get_addr_index(dev, 1);
- if (addr == FDT_ADDR_T_NONE)
- return -EINVAL;
+ /*
+ * Handle legacy compatible combinations which used two reg values
+ * for the i.MX8ULP and i.MX93.
+ */
+ if (device_is_compatible(dev, "fsl,imx7ulp-gpio") &&
+ (device_is_compatible(dev, "fsl,imx93-gpio") ||
+ (device_is_compatible(dev, "fsl,imx8ulp-gpio"))))
+ dual_base = true;
+
+ if (dual_base) {
+ addr = devfdt_get_addr_index(dev, 1);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+ } else {
+ addr = devfdt_get_addr_index(dev, 0);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ addr += IMX8ULP_GPIO_BASE_OFF;
+ }
/*
* TODO:
return 0;
}
+static struct imx_rgpio2p_soc_data imx7ulp_data = {
+ .have_dual_base = true,
+};
+
+static struct imx_rgpio2p_soc_data imx8ulp_data = {
+ .have_dual_base = false,
+};
static const struct udevice_id imx_rgpio2p_ids[] = {
- { .compatible = "fsl,imx7ulp-gpio" },
+ { .compatible = "fsl,imx7ulp-gpio", .data = (ulong)&imx7ulp_data },
+ { .compatible = "fsl,imx8ulp-gpio", .data = (ulong)&imx8ulp_data },
{ }
};