arm: socfpga: arria10: add option to reprogram the FPGA every reboot

Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
This option allows to change the bitstream on the filesystem and apply
changes with warm reboot without the need for a power cycle.

Signed-off-by: Michał Barnaś <barnas@google.com>

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 1008232cac801fbd6b709526d8cec667b458be75..6b6a162f56892e2a676b4e4ca01ef6b80a8e4ab6 100644 (file)
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -90,6 +90,14 @@ config TARGET_SOCFPGA_ARRIA10
        imply FPGA_SOCFPGA
        imply SPL_USE_TINY_PRINTF
 
+config SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
+       bool "Always reprogram Arria 10 FPGA"
+       depends on TARGET_SOCFPGA_ARRIA10
+       help
+         Arria 10 FPGA is only programmed during the cold boot.
+         This option forces the FPGA to be reprogrammed every reboot,
+         allowing to change the bitstream and apply it with warm reboot.
+
 config TARGET_SOCFPGA_CYCLONE5
        bool
        select TARGET_SOCFPGA_GEN5

diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index 9edbbf4a29c35a35d2f0a230cec5f3e1229d5211..3981d2d4f140779f4ed2f276290d2520c2edc3dd 100644 (file)
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -122,7 +122,10 @@ void spl_board_init(void)
        arch_early_init_r();
 
        /* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
-       if (is_fpgamgr_user_mode()) {
+       if ((IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) &&
+            is_regular_boot_valid()) ||
+           (!IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) &&
+            is_fpgamgr_user_mode())) {
                ret = config_pins(gd->fdt_blob, "shared");
                if (ret)
                        return;
@@ -130,7 +133,8 @@ void spl_board_init(void)
                ret = config_pins(gd->fdt_blob, "fpga");
                if (ret)
                        return;
-       } else if (!is_fpgamgr_early_user_mode()) {
+       } else if (IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) ||
+                  !is_fpgamgr_early_user_mode()) {
                /* Program IOSSM(early IO release) or full FPGA */
                fpgamgr_program(buf, FPGA_BUFSIZ, 0);