]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
Convert CONFIG_FSL_USDHC to Kconfig
authorTom Rini <trini@konsulko.com>
Mon, 8 Nov 2021 03:59:37 +0000 (22:59 -0500)
committerTom Rini <trini@konsulko.com>
Fri, 12 Nov 2021 19:18:17 +0000 (14:18 -0500)
This converts the following to Kconfig:
   CONFIG_FSL_USDHC

Signed-off-by: Tom Rini <trini@konsulko.com>
21 files changed:
configs/imx8mm-cl-iot-gate-optee_defconfig
configs/imx8mm-cl-iot-gate_defconfig
configs/imx8mm_evk_defconfig
configs/imx8mn_ddr4_evk_defconfig
configs/imx8mn_evk_defconfig
configs/imx8mp_evk_defconfig
configs/imx8qm_rom7720_a1_4G_defconfig
configs/kontron-sl-mx8mm_defconfig
configs/phycore-imx8mm_defconfig
configs/phycore-imx8mp_defconfig
configs/verdin-imx8mm_defconfig
include/configs/brppt2.h
include/configs/imx8mm-cl-iot-gate.h
include/configs/imx8mm_evk.h
include/configs/imx8mn_evk.h
include/configs/imx8mp_evk.h
include/configs/imx8qm_rom7720.h
include/configs/kontron-sl-mx8mm.h
include/configs/phycore_imx8mm.h
include/configs/phycore_imx8mp.h
include/configs/verdin-imx8mm.h

index 79d482141af9fc5d48c4c1c48e7b61fc8785405b..29d060166b0b26959732d8ab1e274eb5b04d9756 100644 (file)
@@ -81,7 +81,7 @@ CONFIG_DM_I2C=y
 CONFIG_DM_KEYBOARD=y
 CONFIG_SUPPORT_EMMC_RPMB=y
 CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ATHEROS=y
index f6c647b825b5d0968e632b009637144ff7ebd228..72848914b5743c806f1314e450faf03e63adfe1f 100644 (file)
@@ -84,7 +84,7 @@ CONFIG_DM_I2C=y
 CONFIG_DM_KEYBOARD=y
 CONFIG_SUPPORT_EMMC_RPMB=y
 CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ATHEROS=y
index d23d3d56480689a55ffae0af47e285002a7c215d..d03bba797b71aaabcc39850d16ee63cbcdd5f94a 100644 (file)
@@ -60,7 +60,7 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
index 740d4e8d83b4dbae1d7ca4ca10ebc4e7ca5d349c..8a0b85a5c270131a5ca221de42c14672fa605e96 100644 (file)
@@ -63,7 +63,7 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
 CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_PINCTRL=y
index 37ce46eac85323f22194bfb39472bf389744a756..3ee15d3edfa5ad836ee29b8cf683875c60c85f49 100644 (file)
@@ -65,7 +65,7 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
 CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_PINCTRL=y
index 3bbadc353244c474f89c6edeb920da6f62a0f5a1..a448734a9298bb7f3b9c8d9301d2cb547c6ce037 100644 (file)
@@ -71,7 +71,7 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
 CONFIG_PHY_REALTEK=y
 CONFIG_DM_ETH=y
 CONFIG_DM_ETH_PHY=y
index e944e69f25faaadb4534a3a839aa2710937fb3a7..fb43fa1962eb70249e4c41b3ec64ecc6b6df18da 100644 (file)
@@ -60,7 +60,7 @@ CONFIG_I2C_MUX=y
 CONFIG_I2C_MUX_PCA954x=y
 CONFIG_MISC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_ATHEROS=y
index 5baf5bbdefc9e94ae2627f754fbd1174c7795ca9..d8567031a44f787c77bf07d361688d6ff22d46ef 100644 (file)
@@ -79,7 +79,7 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_DM_SPI_FLASH=y
index e54b2d1ef421d8a34e3fd8112c3bd7eaa6abb649..89a4f28bba4f93fc6ecb6f5d0a7f864f1836178a 100644 (file)
@@ -80,7 +80,7 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_DM_SPI_FLASH=y
index fdc136cc75809aeaff27313418c609da3f245745..758c2881cb82611296f960ddd4e0f049769c3b48 100644 (file)
@@ -81,7 +81,7 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_TI_DP83867=y
 CONFIG_DM_ETH=y
index 791bdf4235c87f5f897892b5fbe7909abca26cc3..6312d8a0b058bd8bbdd5a5b44f7303476add97de 100644 (file)
@@ -76,7 +76,7 @@ CONFIG_DM_I2C=y
 CONFIG_MISC=y
 CONFIG_I2C_EEPROM=y
 CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_MICREL=y
index 3f54bafdb88a61b7d3e0c3176c4cf07117ce70cb..76a28dc761807dc87b34b395fbe992270b3629c9 100644 (file)
@@ -21,7 +21,6 @@
 #define CONFIG_MXC_GPT_HCLK
 
 /* MMC */
-#define CONFIG_FSL_USDHC
 
 /* Boot */
 
index 9b86e0a9a07752e8addb4c914679c845b6a59e00..caab69ab2ae48f0ba33f4cec47dff4b95d403b1a 100644 (file)
                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 
 /* USDHC */
-#define CONFIG_FSL_USDHC
 
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
index 4c8f562737500ae16900f8a0b3b462f572c7de22..167ca19f2108c0228ce9ef7eface8ba2719ac624 100644 (file)
@@ -81,7 +81,6 @@
                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 
 /* USDHC */
-#define CONFIG_FSL_USDHC
 
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
index 1e18a87987777d2a62706498d6f8801f241a1d96..ab8932149213b53462eacbd556f2ca37f24bf69c 100644 (file)
@@ -80,7 +80,6 @@
                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 
 /* USDHC */
-#define CONFIG_FSL_USDHC
 
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
index 1c636d94f6f77ccd4c2bcc6add1fd74f75afff6a..30cce1a49e2faa359eba8433f2cc0bca4ec888ae 100644 (file)
@@ -97,8 +97,6 @@
 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 
-#define CONFIG_FSL_USDHC
-
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
index b524ce307076481140d18d021a92b06865b91ca1..2c80f268a41ea94fcbe5fb447449cc8170756be6 100644 (file)
@@ -15,7 +15,6 @@
 #define CONFIG_SPL_BSS_START_ADDR      0x00128000
 #define CONFIG_SPL_BSS_MAX_SIZE        0x1000  /* 4 KB */
 
-#define CONFIG_FSL_USDHC
 #define CONFIG_SYS_BOOTMAPSZ           (256 << 20)
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 #define USDHC1_BASE_ADDR               0x5B010000
index 52aa4473a2fd219d6eb153cd582ff759bb2effe0..d1e87f97d6da0678e7fd6854be035f64fbc6c91f 100644 (file)
@@ -54,7 +54,6 @@
 
 #define CONFIG_SYS_BOOTM_LEN           SZ_64M
 #define CONFIG_SPL_MAX_SIZE            (148 * SZ_1K)
-#define CONFIG_FSL_USDHC
 
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_STACK               0x91fff0
index e74f2b27954f9c1ea05874f1b64781812524c26a..38c8a836170fc7e1c1a9100014a3e3e3b0fcaf3c 100644 (file)
 #define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
 
 /* USDHC */
-#define CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 #define CONFIG_SYS_MMC_IMG_LOAD_PART   1
index 356544a67274fa664d62701bff992696e98ecd49..fcd5896a97bdabe7343be91583e31a17547c28cf 100644 (file)
 #define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
 
 /* USDHC */
-#define CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 #define CONFIG_SYS_MMC_IMG_LOAD_PART   1
index 693fd6907ebfad561afea24dd7609caaf0d26708..7fbec270bff5c0df93b0c66b478dc7f0b195ffcd 100644 (file)
 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 /* USDHC */
-#define CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 #define CONFIG_SYS_MMC_IMG_LOAD_PART   1