CONFIG_DM_KEYBOARD=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_DM_KEYBOARD=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_PINCTRL=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_PINCTRL=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_DM_ETH_PHY=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_ATHEROS=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_TI_DP83867=y
CONFIG_DM_ETH=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_MICREL=y
#define CONFIG_MXC_GPT_HCLK
/* MMC */
-#define CONFIG_FSL_USDHC
/* Boot */
sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_FSL_USDHC
-
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SPL_BSS_START_ADDR 0x00128000
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5B010000
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K)
-#define CONFIG_FSL_USDHC
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_STACK 0x91fff0
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* USDHC */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* USDHC */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1