]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
powerpc: Add T4160QDS
authorYork Sun <yorksun@freescale.com>
Mon, 25 Mar 2013 07:33:31 +0000 (07:33 +0000)
committerAndy Fleming <afleming@freescale.com>
Tue, 14 May 2013 21:00:30 +0000 (16:00 -0500)
T4160QDS shares the same platform as T4240QDS. T4160 is a low power
version of T4240, with eight e6500 cores, two DDR3 controllers, and
slightly different SerDes protocols.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
boards.cfg
include/configs/t4qds.h

index 27815c67a210027fe9e7a3fe55cfb8e053c13b54..34fc20f891ed0eaf6a66dc97d2094326dea2df5c 100644 (file)
@@ -896,6 +896,9 @@ stxssa_4M                    powerpc     mpc85xx     stxssa              stx
 T4240QDS                     powerpc     mpc85xx     t4qds               freescale      -           T4240QDS:PPC_T4240
 T4240QDS_SDCARD              powerpc     mpc85xx     t4qds               freescale     -           T4240QDS:PPC_T4240,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
 T4240QDS_SPIFLASH            powerpc     mpc85xx     t4qds               freescale     -           T4240QDS:PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
+T4160QDS                     powerpc     mpc85xx     t4qds               freescale      -           T4240QDS:PPC_T4160
+T4160QDS_SDCARD              powerpc     mpc85xx     t4qds               freescale     -           T4240QDS:PPC_T4160,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
+T4160QDS_SPIFLASH            powerpc     mpc85xx     t4qds               freescale     -           T4240QDS:PPC_T4160,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
 B4860QDS                     powerpc     mpc85xx     b4860qds            freescale      -           B4860QDS:PPC_B4860
 B4860QDS_NAND               powerpc     mpc85xx     b4860qds            freescale      -           B4860QDS:PPC_B4860,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
 B4860QDS_SPIFLASH            powerpc     mpc85xx     b4860qds            freescale     -           B4860QDS:PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
index dbaa7ea9d330bd52ba6be160bda3decd5c971d68..a8346f0800298379c257ba007a5ae4149cd0d0fa 100644 (file)
@@ -791,8 +791,21 @@ unsigned long get_board_ddr_clk(void);
 
 #define __USB_PHY_TYPE utmi
 
+/*
+ * T4240 has 3 DDR controllers. Default to 3way_4KB interleaving. It can be
+ * 3way_1KB, 3way_4KB, 3way_8KB. T4160 has 2 DDR controllers. Default to
+ * cacheline interleaving. It can be cacheline, page, bank, superbank.
+ * See doc/README.fsl-ddr for details.
+ */
+#ifdef CONFIG_PPC_T4240
+#define CTRL_INTLV_PREFERED 3way_4KB
+#else
+#define CTRL_INTLV_PREFERED cacheline
+#endif
+
 #define        CONFIG_EXTRA_ENV_SETTINGS                               \
-       "hwconfig=fsl_ddr:ctlr_intlv=3way_4KB,"         \
+       "hwconfig=fsl_ddr:"                                     \
+       "ctlr_intlv=" __stringify(CTRL_INTLV_PREFERED) ","      \
        "bank_intlv=auto;"                                      \
        "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\
        "netdev=eth0\0"                                         \