]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
board: gateworks: gw_ventana: add support for GPY111 PHY
authorTim Harvey <tharvey@gateworks.com>
Fri, 29 Apr 2022 20:51:02 +0000 (13:51 -0700)
committerStefano Babic <sbabic@denx.de>
Fri, 20 May 2022 07:30:28 +0000 (09:30 +0200)
The MaxLinear GPY111 PHY is being used on some boards due to part
availability. Add support for this PHY which requires a longer reset
post-delay and RGMII delay configuration.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
12 files changed:
arch/arm/dts/imx6qdl-gw51xx.dtsi
arch/arm/dts/imx6qdl-gw52xx.dtsi
arch/arm/dts/imx6qdl-gw53xx.dtsi
arch/arm/dts/imx6qdl-gw54xx.dtsi
arch/arm/dts/imx6qdl-gw560x.dtsi
arch/arm/dts/imx6qdl-gw5903.dtsi
arch/arm/dts/imx6qdl-gw5904.dtsi
arch/arm/dts/imx6qdl-gw5907.dtsi
arch/arm/dts/imx6qdl-gw5910.dtsi
arch/arm/dts/imx6qdl-gw5912.dtsi
arch/arm/dts/imx6qdl-gw5913.dtsi
board/gateworks/gw_ventana/gw_ventana.c

index 812acf7ab82444f442526501903f450d1c8289c4..139ffe012dc3a39660a002f6f63fa1cfbbe16ffe 100644 (file)
        phy-mode = "rgmii-id";
        phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <10>;
-       phy-reset-post-delay = <100>;
+       phy-reset-post-delay = <300>;
        status = "okay";
 };
 
index 81a9ce38b9b149a53d5c5528dd236c4b93a68327..1b5c836ff39b6ea1a87a9f5efabbe9d5d7be5609 100644 (file)
        phy-mode = "rgmii-id";
        phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <10>;
-       phy-reset-post-delay = <100>;
+       phy-reset-post-delay = <300>;
        status = "okay";
 };
 
index 77ac103c2d9f494945a4582348e75a5c7f504453..e5e9e0c0589ad94c4b11097f095e25698efc200b 100644 (file)
        phy-mode = "rgmii-id";
        phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <10>;
-       phy-reset-post-delay = <100>;
+       phy-reset-post-delay = <300>;
        status = "okay";
 };
 
index 98c81e9c9b5bc27a110c4a703d57df67fd70adcf..2f41f092142466269fd2318ecd298cdff8234e27 100644 (file)
        phy-mode = "rgmii-id";
        phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <10>;
-       phy-reset-post-delay = <100>;
+       phy-reset-post-delay = <300>;
        status = "okay";
 };
 
index 1e95267c974ff3117836bc98f11b244cfc53b161..6586d877204cc5c8390f3b515b74070450d82c83 100644 (file)
        phy-mode = "rgmii-id";
        phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <10>;
-       phy-reset-post-delay = <100>;
+       phy-reset-post-delay = <300>;
        status = "okay";
 };
 
index 6ebf6aef2f7dcc45f91ba9b49a8be36ce6dcdaef..1df3faba4167a751eddd5eda0883ad599c787674 100644 (file)
        phy-mode = "rgmii-id";
        phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <10>;
-       phy-reset-post-delay = <100>;
+       phy-reset-post-delay = <300>;
        status = "okay";
 };
 
index 286c7a9924c2df5ee2bfe07cde44fead4d2f8802..381f605cc0d5997a32c860abcd2fe007125e1892 100644 (file)
        phy-mode = "rgmii-id";
        phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <10>;
-       phy-reset-post-delay = <100>;
+       phy-reset-post-delay = <300>;
        status = "okay";
 
        fixed-link {
index a36b6e7048c79dcbb267d6f6f9f4e193606ba453..68585f84d13c95b5744ce7d6016eb58824273e24 100644 (file)
        phy-mode = "rgmii-id";
        phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <10>;
-       phy-reset-post-delay = <100>;
+       phy-reset-post-delay = <300>;
        status = "okay";
 };
 
index 446c1043a7687ecea851d3554fe20c53b2b6140b..594468dcba8e17e30fa8bc75182e7332ee62b285 100644 (file)
        phy-mode = "rgmii-id";
        phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <10>;
-       phy-reset-post-delay = <100>;
+       phy-reset-post-delay = <300>;
        status = "okay";
 };
 
index 8fd8fdb5147c94d6aa7ef44762007125327c497b..f51ec3d62ce00d7a452d6a57aabc1b9fc4ecd186 100644 (file)
        phy-mode = "rgmii-id";
        phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <10>;
-       phy-reset-post-delay = <100>;
+       phy-reset-post-delay = <300>;
        status = "okay";
 };
 
index c2c1c2b160d4e66987eeee11a2a02bcd9f3df955..44d347f04eb638d1c1a5882427fa4520792e1c2f 100644 (file)
        phy-mode = "rgmii-id";
        phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <10>;
-       phy-reset-post-delay = <100>;
+       phy-reset-post-delay = <300>;
        status = "okay";
 };
 
index c06630a66b66c4917b917bea7becfb372534815b..99f52b9953e23e3c1b7ce2d50e83fefb7a94d95e 100644 (file)
@@ -32,9 +32,10 @@ DECLARE_GLOBAL_DATA_PTR;
 int board_phy_config(struct phy_device *phydev)
 {
        unsigned short val;
+       ofnode node;
 
-       /* Marvel 88E1510 */
-       if (phydev->phy_id == 0x1410dd1) {
+       switch (phydev->phy_id) {
+       case 0x1410dd1:
                puts("MV88E1510");
                /*
                 * Page 3, Register 16: LED[2:0] Function Control Register
@@ -47,10 +48,8 @@ int board_phy_config(struct phy_device *phydev)
                val |= 0x0017;
                phy_write(phydev, MDIO_DEVAD_NONE, 16, val);
                phy_write(phydev, MDIO_DEVAD_NONE, 22, 0);
-       }
-
-       /* TI DP83867 */
-       else if (phydev->phy_id == 0x2000a231) {
+               break;
+       case 0x2000a231:
                puts("TIDP83867 ");
                /* LED configuration */
                val = 0;
@@ -66,6 +65,22 @@ int board_phy_config(struct phy_device *phydev)
                val &= ~0x1f00;
                val |= 0x0b00; /* chD tx clock*/
                phy_write(phydev, MDIO_DEVAD_NONE, 14, val);
+               break;
+       case 0xd565a401:
+               puts("GPY111 ");
+               node = phy_get_ofnode(phydev);
+               if (ofnode_valid(node)) {
+                       u32 rx_delay, tx_delay;
+
+                       rx_delay = ofnode_read_u32_default(node, "rx-internal-delay-ps", 2000);
+                       tx_delay = ofnode_read_u32_default(node, "tx-internal-delay-ps", 2000);
+                       val = phy_read(phydev, MDIO_DEVAD_NONE, 0x17);
+                       val &= ~((0x7 << 12) | (0x7 << 8));
+                       val |= (rx_delay / 500) << 12;
+                       val |= (tx_delay / 500) << 8;
+                       phy_write(phydev, MDIO_DEVAD_NONE, 0x17, val);
+               }
+               break;
        }
 
        if (phydev->drv->config)