]> git.dujemihanovic.xyz Git - u-boot.git/commit
clk: rockchip: rk356x: Fix set rate of SCLK_SFC clock
authorJonas Karlman <jonas@kwiboo.se>
Mon, 22 Apr 2024 06:28:40 +0000 (06:28 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Fri, 26 Apr 2024 07:47:04 +0000 (15:47 +0800)
commit0b6afc3993d92a542e328afdccaedf95b9c9c98f
tree22fa100e0ce9d96ef36524ff0bd3dbd458dfbec2
parent80274d1b642bbe2fc6f58552fe3d76bfe65ba084
clk: rockchip: rk356x: Fix set rate of SCLK_SFC clock

The SCLK_SFC can be set to a rate of 24, 50, 75, 100, 125 or 150 MHz.

However, clk_set_rate() will fail unless one of those exact rates are
used, and with newer and updated device tree files that contain
spi-max-frequency values that does not exactly match these rates use of
SPI flash may fail.

Fix this by using the highest possible rate that exceeds or is equal to
the requested rate.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
drivers/clk/rockchip/clk_rk3568.c